diff --git a/src/codegen/x86_64/Encoding.zig b/src/codegen/x86_64/Encoding.zig
index 3b41e0b07a..6043fd06b5 100644
--- a/src/codegen/x86_64/Encoding.zig
+++ b/src/codegen/x86_64/Encoding.zig
@@ -297,7 +297,7 @@ pub const Mnemonic = enum {
     jnc, jne, jng, jnge, jnl, jnle, jno, jnp, jns, jnz, jo, jp, jpe, jpo, jrcxz, js, jz,
     lahf, lar, lea, leave, lfence, lgdt, lidt, lldt, lmsw, loop, loope, loopne,
     lods, lodsb, lodsd, lodsq, lodsw,
-    lsl, ltr,
+    lret, lsl, ltr,
     mfence, mov, movbe,
     movs, movsb, movsd, movsq, movsw,
     movsx, movsxd, movzx, mul,
diff --git a/src/codegen/x86_64/Mir.zig b/src/codegen/x86_64/Mir.zig
index caf41ffb39..de02fbc01e 100644
--- a/src/codegen/x86_64/Mir.zig
+++ b/src/codegen/x86_64/Mir.zig
@@ -1732,7 +1732,7 @@ pub const Inst = struct {
             assert(@sizeOf(Data) == 8);
         }
         const Mnemonic = @import("Encoding.zig").Mnemonic;
-        if (@typeInfo(Mnemonic).@"enum".fields.len != 977 or
+        if (@typeInfo(Mnemonic).@"enum".fields.len != 978 or
             @typeInfo(Fixes).@"enum".fields.len != 231 or
             @typeInfo(Tag).@"enum".fields.len != 251)
         {
@@ -1741,7 +1741,7 @@ pub const Inst = struct {
                     return @src();
                 }
             }).src();
-            @setEvalBranchQuota(1_750_000);
+            @setEvalBranchQuota(2_000_000);
             for (@typeInfo(Mnemonic).@"enum".fields) |mnemonic| {
                 if (mnemonic.name[0] == '.') continue;
                 for (@typeInfo(Fixes).@"enum".fields) |fixes| {
diff --git a/src/codegen/x86_64/encodings.zon b/src/codegen/x86_64/encodings.zon
index 1a27ca9826..dde5d5a8c7 100644
--- a/src/codegen/x86_64/encodings.zon
+++ b/src/codegen/x86_64/encodings.zon
@@ -459,6 +459,8 @@
     .{ .loope,  .d, .{ .rel8 }, .{ 0xe1 }, 0, .none, .none },
     .{ .loopne, .d, .{ .rel8 }, .{ 0xe0 }, 0, .none, .none },
 
+    .{ .lret, .z, .{}, .{ 0xcb }, 0, .none, .none },
+
     .{ .lsl, .rm, .{ .r16, .rm16    }, .{ 0x0f, 0x03 }, 0, .none, .none },
     .{ .lsl, .rm, .{ .r32, .r32_m16 }, .{ 0x0f, 0x03 }, 0, .none, .none },
     .{ .lsl, .rm, .{ .r64, .r32_m16 }, .{ 0x0f, 0x03 }, 0, .none, .none },