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SPIR-V: Re-generate spec.zig
This commit is contained in:
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1 changed files with 89 additions and 31 deletions
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@ -1,26 +1,5 @@
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// Copyright (c) 2014-2020 The Khronos Group Inc.
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//! This file is auto-generated by tools/gen_spirv_spec.zig.
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//
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// Permission is hereby granted, free of charge, to any person obtaining a copy
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// of this software and/or associated documentation files (the "Materials"),
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// to deal in the Materials without restriction, including without limitation
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// the rights to use, copy, modify, merge, publish, distribute, sublicense,
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// and/or sell copies of the Materials, and to permit persons to whom the
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// Materials are furnished to do so, subject to the following conditions:
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//
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// The above copyright notice and this permission notice shall be included in
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// all copies or substantial portions of the Materials.
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//
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// MODIFICATIONS TO THIS FILE MAY MEAN IT NO LONGER ACCURATELY REFLECTS KHRONOS
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// STANDARDS. THE UNMODIFIED, NORMATIVE VERSIONS OF KHRONOS SPECIFICATIONS AND
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// HEADER INFORMATION ARE LOCATED AT https://www.khronos.org/registry/
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//
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// THE MATERIALS ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
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// OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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// THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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// FROM,OUT OF OR IN CONNECTION WITH THE MATERIALS OR THE USE OR OTHER DEALINGS
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// IN THE MATERIALS.
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const Version = @import("builtin").Version;
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const Version = @import("builtin").Version;
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pub const version = Version{ .major = 1, .minor = 5, .patch = 4 };
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pub const version = Version{ .major = 1, .minor = 5, .patch = 4 };
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pub const magic_number: u32 = 0x07230203;
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pub const magic_number: u32 = 0x07230203;
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@ -443,8 +422,15 @@ pub const Opcode = extern enum(u16) {
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OpUSubSatINTEL = 5596,
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OpUSubSatINTEL = 5596,
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OpIMul32x16INTEL = 5597,
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OpIMul32x16INTEL = 5597,
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OpUMul32x16INTEL = 5598,
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OpUMul32x16INTEL = 5598,
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OpFunctionPointerINTEL = 5600,
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OpConstFunctionPointerINTEL = 5600,
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OpFunctionPointerCallINTEL = 5601,
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OpFunctionPointerCallINTEL = 5601,
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OpAsmTargetINTEL = 5609,
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OpAsmINTEL = 5610,
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OpAsmCallINTEL = 5611,
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OpAtomicFMinEXT = 5614,
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OpAtomicFMaxEXT = 5615,
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OpAssumeTrueKHR = 5630,
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OpExpectKHR = 5631,
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OpDecorateString = 5632,
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OpDecorateString = 5632,
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OpDecorateStringGOOGLE = 5632,
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OpDecorateStringGOOGLE = 5632,
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OpMemberDecorateString = 5633,
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OpMemberDecorateString = 5633,
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@ -567,7 +553,12 @@ pub const Opcode = extern enum(u16) {
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OpSubgroupAvcSicGetPackedSkcLumaCountThresholdINTEL = 5814,
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OpSubgroupAvcSicGetPackedSkcLumaCountThresholdINTEL = 5814,
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OpSubgroupAvcSicGetPackedSkcLumaSumThresholdINTEL = 5815,
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OpSubgroupAvcSicGetPackedSkcLumaSumThresholdINTEL = 5815,
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OpSubgroupAvcSicGetInterRawSadsINTEL = 5816,
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OpSubgroupAvcSicGetInterRawSadsINTEL = 5816,
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OpVariableLengthArrayINTEL = 5818,
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OpSaveMemoryINTEL = 5819,
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OpRestoreMemoryINTEL = 5820,
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OpLoopControlINTEL = 5887,
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OpLoopControlINTEL = 5887,
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OpPtrCastToCrossWorkgroupINTEL = 5934,
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OpCrossWorkgroupCastToPtrINTEL = 5938,
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OpReadPipeBlockingINTEL = 5946,
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OpReadPipeBlockingINTEL = 5946,
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OpWritePipeBlockingINTEL = 5947,
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OpWritePipeBlockingINTEL = 5947,
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OpFPGARegINTEL = 5949,
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OpFPGARegINTEL = 5949,
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@ -589,6 +580,10 @@ pub const Opcode = extern enum(u16) {
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OpRayQueryGetIntersectionObjectToWorldKHR = 6031,
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OpRayQueryGetIntersectionObjectToWorldKHR = 6031,
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OpRayQueryGetIntersectionWorldToObjectKHR = 6032,
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OpRayQueryGetIntersectionWorldToObjectKHR = 6032,
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OpAtomicFAddEXT = 6035,
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OpAtomicFAddEXT = 6035,
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OpTypeBufferSurfaceINTEL = 6086,
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OpTypeStructContinuedINTEL = 6090,
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OpConstantCompositeContinuedINTEL = 6091,
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OpSpecConstantCompositeContinuedINTEL = 6092,
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_,
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_,
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};
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};
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pub const ImageOperands = packed struct {
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pub const ImageOperands = packed struct {
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@ -642,8 +637,8 @@ pub const FPFastMathMode = packed struct {
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_reserved_bit_13: bool = false,
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_reserved_bit_13: bool = false,
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_reserved_bit_14: bool = false,
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_reserved_bit_14: bool = false,
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_reserved_bit_15: bool = false,
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_reserved_bit_15: bool = false,
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_reserved_bit_16: bool = false,
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AllowContractFastINTEL: bool = false,
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_reserved_bit_17: bool = false,
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AllowReassocINTEL: bool = false,
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_reserved_bit_18: bool = false,
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_reserved_bit_18: bool = false,
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_reserved_bit_19: bool = false,
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_reserved_bit_19: bool = false,
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_reserved_bit_20: bool = false,
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_reserved_bit_20: bool = false,
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@ -717,7 +712,7 @@ pub const LoopControl = packed struct {
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LoopCoalesceINTEL: bool = false,
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LoopCoalesceINTEL: bool = false,
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MaxInterleavingINTEL: bool = false,
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MaxInterleavingINTEL: bool = false,
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SpeculatedIterationsINTEL: bool = false,
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SpeculatedIterationsINTEL: bool = false,
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_reserved_bit_23: bool = false,
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NoFusionINTEL: bool = false,
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_reserved_bit_24: bool = false,
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_reserved_bit_24: bool = false,
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_reserved_bit_25: bool = false,
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_reserved_bit_25: bool = false,
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_reserved_bit_26: bool = false,
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_reserved_bit_26: bool = false,
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@ -1037,10 +1032,16 @@ pub const ExecutionMode = extern enum(u32) {
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SampleInterlockUnorderedEXT = 5369,
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SampleInterlockUnorderedEXT = 5369,
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ShadingRateInterlockOrderedEXT = 5370,
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ShadingRateInterlockOrderedEXT = 5370,
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ShadingRateInterlockUnorderedEXT = 5371,
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ShadingRateInterlockUnorderedEXT = 5371,
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SharedLocalMemorySizeINTEL = 5618,
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RoundingModeRTPINTEL = 5620,
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RoundingModeRTNINTEL = 5621,
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FloatingPointModeALTINTEL = 5622,
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FloatingPointModeIEEEINTEL = 5623,
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MaxWorkgroupSizeINTEL = 5893,
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MaxWorkgroupSizeINTEL = 5893,
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MaxWorkDimINTEL = 5894,
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MaxWorkDimINTEL = 5894,
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NoGlobalOffsetINTEL = 5895,
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NoGlobalOffsetINTEL = 5895,
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NumSIMDWorkitemsINTEL = 5896,
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NumSIMDWorkitemsINTEL = 5896,
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SchedulerTargetFmaxMhzINTEL = 5903,
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_,
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_,
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};
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};
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pub const StorageClass = extern enum(u32) {
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pub const StorageClass = extern enum(u32) {
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@ -1072,6 +1073,8 @@ pub const StorageClass = extern enum(u32) {
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PhysicalStorageBuffer = 5349,
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PhysicalStorageBuffer = 5349,
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PhysicalStorageBufferEXT = 5349,
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PhysicalStorageBufferEXT = 5349,
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CodeSectionINTEL = 5605,
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CodeSectionINTEL = 5605,
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DeviceOnlyINTEL = 5936,
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HostOnlyINTEL = 5937,
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_,
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};
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};
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pub const Dim = extern enum(u32) {
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pub const Dim = extern enum(u32) {
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@ -1192,9 +1195,20 @@ pub const FPRoundingMode = extern enum(u32) {
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RTN = 3,
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RTN = 3,
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_,
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};
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};
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pub const FPDenormMode = extern enum(u32) {
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Preserve = 0,
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FlushToZero = 1,
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};
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pub const FPOperationMode = extern enum(u32) {
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IEEE = 0,
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ALT = 1,
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};
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pub const LinkageType = extern enum(u32) {
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pub const LinkageType = extern enum(u32) {
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Export = 0,
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Export = 0,
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Import = 1,
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Import = 1,
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LinkOnceODR = 2,
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_,
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};
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};
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pub const AccessQualifier = extern enum(u32) {
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pub const AccessQualifier = extern enum(u32) {
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RestrictPointerEXT = 5355,
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RestrictPointerEXT = 5355,
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AliasedPointer = 5356,
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AliasedPointer = 5356,
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AliasedPointerEXT = 5356,
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AliasedPointerEXT = 5356,
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SIMTCallINTEL = 5599,
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ReferencedIndirectlyINTEL = 5602,
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ReferencedIndirectlyINTEL = 5602,
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ClobberINTEL = 5607,
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SideEffectsINTEL = 5608,
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VectorComputeVariableINTEL = 5624,
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FuncParamIOKindINTEL = 5625,
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VectorComputeFunctionINTEL = 5626,
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StackCallINTEL = 5627,
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GlobalVariableOffsetINTEL = 5628,
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CounterBuffer = 5634,
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CounterBuffer = 5634,
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HlslCounterBufferGOOGLE = 5634,
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HlslCounterBufferGOOGLE = 5634,
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UserSemantic = 5635,
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UserSemantic = 5635,
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HlslSemanticGOOGLE = 5635,
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HlslSemanticGOOGLE = 5635,
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UserTypeGOOGLE = 5636,
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UserTypeGOOGLE = 5636,
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FunctionRoundingModeINTEL = 5822,
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FunctionDenormModeINTEL = 5823,
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RegisterINTEL = 5825,
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RegisterINTEL = 5825,
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MemoryINTEL = 5826,
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MemoryINTEL = 5826,
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NumbanksINTEL = 5827,
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NumbanksINTEL = 5827,
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MergeINTEL = 5834,
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MergeINTEL = 5834,
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BankBitsINTEL = 5835,
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BankBitsINTEL = 5835,
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ForcePow2DepthINTEL = 5836,
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ForcePow2DepthINTEL = 5836,
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BurstCoalesceINTEL = 5899,
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CacheSizeINTEL = 5900,
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DontStaticallyCoalesceINTEL = 5901,
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PrefetchINTEL = 5902,
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StallEnableINTEL = 5905,
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FuseLoopsInFunctionINTEL = 5907,
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BufferLocationINTEL = 5921,
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IOPipeStorageINTEL = 5944,
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FunctionFloatingPointModeINTEL = 6080,
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SingleElementVectorINTEL = 6085,
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VectorComputeCallableFunctionINTEL = 6087,
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};
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};
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pub const BuiltIn = extern enum(u32) {
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pub const BuiltIn = extern enum(u32) {
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VertexIndex = 42,
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VertexIndex = 42,
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InstanceIndex = 43,
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InstanceIndex = 43,
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SubgroupEqMask = 4416,
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SubgroupEqMask = 4416,
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SubgroupGeMask = 4417,
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SubgroupGtMask = 4418,
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SubgroupLeMask = 4419,
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SubgroupLtMask = 4420,
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SubgroupEqMaskKHR = 4416,
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SubgroupEqMaskKHR = 4416,
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SubgroupGeMask = 4417,
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SubgroupGeMaskKHR = 4417,
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SubgroupGeMaskKHR = 4417,
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SubgroupGtMask = 4418,
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SubgroupGtMaskKHR = 4418,
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SubgroupGtMaskKHR = 4418,
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SubgroupLeMask = 4419,
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SubgroupLeMaskKHR = 4419,
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SubgroupLeMaskKHR = 4419,
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SubgroupLtMask = 4420,
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SubgroupLtMaskKHR = 4420,
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SubgroupLtMaskKHR = 4420,
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BaseVertex = 4424,
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BaseVertex = 4424,
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BaseInstance = 4425,
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BaseInstance = 4425,
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FragmentShadingRateKHR = 4422,
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FragmentShadingRateKHR = 4422,
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SubgroupBallotKHR = 4423,
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SubgroupBallotKHR = 4423,
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DrawParameters = 4427,
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DrawParameters = 4427,
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WorkgroupMemoryExplicitLayoutKHR = 4428,
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WorkgroupMemoryExplicitLayout8BitAccessKHR = 4429,
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WorkgroupMemoryExplicitLayout16BitAccessKHR = 4430,
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SubgroupVoteKHR = 4431,
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SubgroupVoteKHR = 4431,
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StorageBuffer16BitAccess = 4433,
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StorageBuffer16BitAccess = 4433,
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StorageUniformBufferBlock16 = 4433,
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StorageUniformBufferBlock16 = 4433,
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SubgroupBufferBlockIOINTEL = 5569,
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SubgroupBufferBlockIOINTEL = 5569,
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SubgroupImageBlockIOINTEL = 5570,
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SubgroupImageBlockIOINTEL = 5570,
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SubgroupImageMediaBlockIOINTEL = 5579,
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SubgroupImageMediaBlockIOINTEL = 5579,
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RoundToInfinityINTEL = 5582,
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FloatingPointModeINTEL = 5583,
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IntegerFunctions2INTEL = 5584,
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IntegerFunctions2INTEL = 5584,
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FunctionPointersINTEL = 5603,
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FunctionPointersINTEL = 5603,
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IndirectReferencesINTEL = 5604,
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IndirectReferencesINTEL = 5604,
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AsmINTEL = 5606,
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AtomicFloat32MinMaxEXT = 5612,
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AtomicFloat64MinMaxEXT = 5613,
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AtomicFloat16MinMaxEXT = 5616,
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VectorComputeINTEL = 5617,
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VectorAnyINTEL = 5619,
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ExpectAssumeKHR = 5629,
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SubgroupAvcMotionEstimationINTEL = 5696,
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SubgroupAvcMotionEstimationINTEL = 5696,
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SubgroupAvcMotionEstimationIntraINTEL = 5697,
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SubgroupAvcMotionEstimationIntraINTEL = 5697,
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SubgroupAvcMotionEstimationChromaINTEL = 5698,
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SubgroupAvcMotionEstimationChromaINTEL = 5698,
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VariableLengthArrayINTEL = 5817,
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FunctionFloatControlINTEL = 5821,
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FPGAMemoryAttributesINTEL = 5824,
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FPGAMemoryAttributesINTEL = 5824,
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FPFastMathModeINTEL = 5837,
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ArbitraryPrecisionIntegersINTEL = 5844,
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UnstructuredLoopControlsINTEL = 5886,
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UnstructuredLoopControlsINTEL = 5886,
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FPGALoopControlsINTEL = 5888,
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FPGALoopControlsINTEL = 5888,
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KernelAttributesINTEL = 5892,
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KernelAttributesINTEL = 5892,
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FPGAKernelAttributesINTEL = 5897,
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FPGAKernelAttributesINTEL = 5897,
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FPGAMemoryAccessesINTEL = 5898,
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FPGAClusterAttributesINTEL = 5904,
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LoopFuseINTEL = 5906,
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FPGABufferLocationINTEL = 5920,
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USMStorageClassesINTEL = 5935,
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IOPipesINTEL = 5943,
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BlockingPipesINTEL = 5945,
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BlockingPipesINTEL = 5945,
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FPGARegINTEL = 5948,
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FPGARegINTEL = 5948,
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AtomicFloat32AddEXT = 6033,
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AtomicFloat32AddEXT = 6033,
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AtomicFloat64AddEXT = 6034,
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AtomicFloat64AddEXT = 6034,
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LongConstantCompositeINTEL = 6089,
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_,
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};
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};
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pub const RayQueryIntersection = extern enum(u32) {
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pub const RayQueryIntersection = extern enum(u32) {
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