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compiler_rt: correctly export allrem and aullrem for i386-windows-msvc

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This commit is contained in:
Jakub Konka 2022-06-13 19:21:38 +02:00 • committed by Andrew Kelley
parent 2259d629d3
commit 57c530155f
4 changed files with 15 additions and 2 deletions
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1
lib/compiler_rt.zig
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@ -62,6 +62,7 @@ comptime {
_ = @import("compiler_rt/emutls.zig");
_ = @import("compiler_rt/arm.zig");
_ = @import("compiler_rt/aulldiv.zig");
_ = @import("compiler_rt/aullrem.zig");
_ = @import("compiler_rt/sparc.zig");
_ = @import("compiler_rt/clear_cache.zig");

2
lib/compiler_rt/aulldiv.zig
View file

@ -10,8 +10,6 @@ comptime {
// Don't let LLVM apply the stdcall name mangling on those MSVC builtins
@export(_alldiv, .{ .name = "\x01__alldiv", .linkage = linkage });
@export(_aulldiv, .{ .name = "\x01__aulldiv", .linkage = linkage });
@export(_allrem, .{ .name = "\x01__allrem", .linkage = linkage });
@export(_aullrem, .{ .name = "\x01__aullrem", .linkage = linkage });
}
}

13
lib/compiler_rt/aullrem.zig
View file

@ -1,4 +1,17 @@
const std = @import("std");
const builtin = @import("builtin");
const arch = builtin.cpu.arch;
const abi = builtin.abi;
const linkage: std.builtin.GlobalLinkage = if (builtin.is_test) .Internal else .Strong;
pub const panic = @import("common.zig").panic;
comptime {
if (arch == .i386 and abi == .msvc) {
// Don't let LLVM apply the stdcall name mangling on those MSVC builtins
@export(_allrem, .{ .name = "\x01__allrem", .linkage = linkage });
@export(_aullrem, .{ .name = "\x01__aullrem", .linkage = linkage });
}
}
pub fn _allrem(a: i64, b: i64) callconv(.Stdcall) i64 {
@setRuntimeSafety(builtin.is_test);

1
src/compiler_rt.zig
View file

@ -227,6 +227,7 @@ const sources = &[_][]const u8{
"compiler_rt/emutls.zig",
"compiler_rt/arm.zig",
"compiler_rt/aulldiv.zig",
"compiler_rt/aullrem.zig",
"compiler_rt/sparc.zig",
"compiler_rt/clear_cache.zig",
};