From 6002514b72cb2a571abc6ac4ac7fbec44d6302b1 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Alex=20R=C3=B8nne=20Petersen?= <alex@alexrp.com>
Date: Wed, 16 Jul 2025 16:54:12 +0200
Subject: [PATCH] test: mark riscv soft float targets as extra targets

Soft float is a very rare use case for riscv*-linux. No point wasting CI
resources on these targets, especially since our arm and mips soft float
coverage is already likely to catch most soft float bugs.
---
 test/tests.zig | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/test/tests.zig b/test/tests.zig
index bdc41e47bd..2a6c4166fa 100644
--- a/test/tests.zig
+++ b/test/tests.zig
@@ -847,6 +847,7 @@ const test_targets = blk: {
                 .arch_os_abi = "riscv32-linux-none",
                 .cpu_features = "baseline-d-f",
             }) catch unreachable,
+            .extra_target = true,
         },
         .{
             .target = .{
@@ -872,6 +873,7 @@ const test_targets = blk: {
                 .cpu_features = "baseline-d-f",
             }) catch unreachable,
             .link_libc = true,
+            .extra_target = true,
         },
         .{
             .target = .{
@@ -904,6 +906,7 @@ const test_targets = blk: {
                 .arch_os_abi = "riscv64-linux-none",
                 .cpu_features = "baseline-d-f",
             }) catch unreachable,
+            .extra_target = true,
         },
         .{
             .target = .{
@@ -929,6 +932,7 @@ const test_targets = blk: {
                 .cpu_features = "baseline-d-f",
             }) catch unreachable,
             .link_libc = true,
+            .extra_target = true,
         },
         .{
             .target = .{