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test: Add riscv(32,64)-linux-(none,musl) with soft float to module tests.
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0941364d70
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1 changed files with 29 additions and 1 deletions
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@ -579,6 +579,20 @@ const test_targets = blk: {
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.link_libc = true,
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},
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.{
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.target = std.Target.Query.parse(.{
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.arch_os_abi = "riscv32-linux-none",
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.cpu_features = "baseline-d-f",
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}) catch unreachable,
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},
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.{
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.target = std.Target.Query.parse(.{
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.arch_os_abi = "riscv32-linux-musl",
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.cpu_features = "baseline-d-f",
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}) catch unreachable,
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.link_libc = true,
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},
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.{
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.target = .{
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.cpu_arch = .riscv32,
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@ -603,6 +617,20 @@ const test_targets = blk: {
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.link_libc = true,
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},
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.{
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.target = std.Target.Query.parse(.{
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.arch_os_abi = "riscv64-linux-none",
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.cpu_features = "baseline-d-f",
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}) catch unreachable,
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},
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.{
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.target = std.Target.Query.parse(.{
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.arch_os_abi = "riscv64-linux-musl",
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.cpu_features = "baseline-d-f",
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}) catch unreachable,
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.link_libc = true,
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},
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.{
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.target = .{
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.cpu_arch = .riscv64,
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@ -631,7 +659,7 @@ const test_targets = blk: {
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.target = std.Target.Query.parse(.{
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.arch_os_abi = "riscv64-linux-musl",
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.cpu_features = "baseline+v+zbb",
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}) catch @panic("OOM"),
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}) catch unreachable,
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.use_llvm = false,
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.use_lld = false,
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},
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