Fix lakemont CpuModel (#9099)

Lakemont has no x86, no MMX, no SSE and no way of handling any fp-math. In theory LLVM is able to implicitly use the soft-float emulation library calls to legalize any such operation but, given Zig's use of many non-standard features, sometimes we hit a weak spot in the X86 codegen backend.

Consider this as a work-around for this LLVM problem, fixing the problem in LLVM is not so high in my todo list as the target is pretty niche and Intel axed it in '19.

(Commit message by @LemonBoy)
This commit is contained in:
d18g 2021-06-17 23:37:38 +03:00 committed by Andrew Kelley
parent 4adbdcb587
commit 71ec89383b
2 changed files with 5 additions and 0 deletions

View file

@ -2241,6 +2241,7 @@ pub const cpu = struct {
.cx8,
.slow_unaligned_mem_16,
.vzeroupper,
.soft_float,
}),
};
pub const nehalem = CpuModel{

View file

@ -754,6 +754,10 @@ const llvm_targets = [_]LlvmTarget{
.llvm_name = "i686",
.zig_name = "_i686",
},
.{
.llvm_name = "lakemont",
.extra_deps = &.{"soft_float"},
},
},
},
.{