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x86_64: implement integer @reduce(.Mul)
This commit is contained in:
Jacob Young
parent
1f6f8b0ffe
commit
7bfdb7f26d
6 changed files with 3830 additions and 141 deletions
File diff suppressed because it is too large
Load diff
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@ -336,7 +336,7 @@ pub const Mnemonic = enum {
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fcom, fcomi, fcomip, fcomp, fcompp, fcos,
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fdecstp, fdiv, fdivp, fdivr, fdivrp, ffree,
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fiadd, ficom, ficomp, fidiv, fidivr, fild, fimul, fincstp, finit,
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fist, fistp, fisttp, fisub, fisubr,
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fist, fistp, fisub, fisubr,
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fld, fld1, fldcw, fldenv, fldl2e, fldl2t, fldlg2, fldln2, fldpi, fldz,
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fmul, fmulp,
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fnclex, fninit, fnop, fnsave, fnstcw, fnstenv, fnstsw,
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@ -349,19 +349,18 @@ pub const Mnemonic = enum {
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// MMX
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emms, movd, movq,
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packssdw, packsswb, packuswb,
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paddb, paddd, paddq, paddsb, paddsw, paddusb, paddusw, paddw,
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paddb, paddd, paddsb, paddsw, paddusb, paddusw, paddw,
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pand, pandn, por, pxor,
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pcmpeqb, pcmpeqd, pcmpeqw,
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pcmpgtb, pcmpgtd, pcmpgtw,
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pmulhw, pmullw,
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pmaddwd, pmulhw, pmullw,
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pslld, psllq, psllw,
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psrad, psraw,
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psrld, psrlq, psrlw,
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psubb, psubd, psubq, psubsb, psubsw, psubusb, psubusw, psubw,
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psubb, psubd, psubsb, psubsw, psubusb, psubusw, psubw,
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// SSE
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addps, addss,
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andps,
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andnps,
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andnps, andps,
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cmpps, cmpss, comiss,
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cvtpi2ps, cvtps2pi, cvtsi2ss, cvtss2si, cvttps2pi, cvttss2si,
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divps, divss,
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@ -374,9 +373,11 @@ pub const Mnemonic = enum {
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movss, movups,
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mulps, mulss,
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orps,
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pavgb, pavgw,
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pextrw, pinsrw,
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pmaxsw, pmaxub, pminsw, pminub, pmovmskb,
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pmaxsw, pmaxub, pminsw, pminub, pmovmskb, pmulhuw,
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prefetchit0, prefetchit1, prefetchnta, prefetcht0, prefetcht1, prefetcht2, prefetchw, prefetchwt1,
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psadbw, pshufw,
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shufps,
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sqrtps, sqrtss,
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stmxcsr,
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@ -397,15 +398,16 @@ pub const Mnemonic = enum {
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maxpd, maxsd,
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minpd, minsd,
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movapd,
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movdqa, movdqu,
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movdq2q, movdqa, movdqu,
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movhpd, movlpd,
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movmskpd,
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movmskpd, movq2dq,
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//movsd,
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movupd,
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mulpd, mulsd,
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orpd,
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paddq, pmuludq,
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pshufd, pshufhw, pshuflw,
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pslldq, psrldq,
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pslldq, psrldq, psubq,
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punpckhbw, punpckhdq, punpckhqdq, punpckhwd,
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punpcklbw, punpckldq, punpcklqdq, punpcklwd,
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shufpd,
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@ -414,9 +416,17 @@ pub const Mnemonic = enum {
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ucomisd, unpckhpd, unpcklpd,
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xorpd,
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// SSE3
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addsubpd, addsubps, haddpd, haddps, lddqu, movddup, movshdup, movsldup,
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addsubpd, addsubps,
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fisttp,
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haddpd, haddps,
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hsubpd, hsubps,
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lddqu,
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movddup, movshdup, movsldup,
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// SSSE3
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pabsb, pabsd, pabsw, palignr, pshufb,
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pabsb, pabsd, pabsw, palignr,
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phaddw, phaddsw, phaddd, phsubw, phsubsw, phsubd,
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pmaddubsw, pmulhrsw, pshufb,
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psignb, psignd, psignw,
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// SSE4.1
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blendpd, blendps, blendvpd, blendvps,
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dppd, dpps,
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@ -430,7 +440,7 @@ pub const Mnemonic = enum {
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pmaxsb, pmaxsd, pmaxud, pmaxuw, pminsb, pminsd, pminud, pminuw,
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pmovsxbd, pmovsxbq, pmovsxbw, pmovsxdq, pmovsxwd, pmovsxwq,
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pmovzxbd, pmovzxbq, pmovzxbw, pmovzxdq, pmovzxwd, pmovzxwq,
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pmulld,
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pmuldq, pmulld,
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ptest,
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roundpd, roundps, roundsd, roundss,
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// SSE4.2
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@ -458,7 +468,7 @@ pub const Mnemonic = enum {
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vdppd, vdpps,
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vextractf128, vextractps,
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vgf2p8affineinvqb, vgf2p8affineqb, vgf2p8mulb,
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vhaddpd, vhaddps,
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vhaddpd, vhaddps, vhsubpd, vhsubps,
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vinsertf128, vinsertps,
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vlddqu, vldmxcsr,
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vmaskmovpd, vmaskmovps,
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@ -480,21 +490,24 @@ pub const Mnemonic = enum {
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vpabsb, vpabsd, vpabsw,
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vpackssdw, vpacksswb, vpackusdw, vpackuswb,
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vpaddb, vpaddd, vpaddq, vpaddsb, vpaddsw, vpaddusb, vpaddusw, vpaddw,
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vpalignr, vpand, vpandn,
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vpalignr, vpand, vpandn, vpavgb, vpavgw,
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vpblendvb, vpblendw, vpclmulqdq,
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vpcmpeqb, vpcmpeqd, vpcmpeqq, vpcmpeqw,
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vpcmpgtb, vpcmpgtd, vpcmpgtq, vpcmpgtw,
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vphaddw, vphaddsw, vphaddd, vphsubw, vphsubsw, vphsubd,
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vperm2f128, vpermilpd, vpermilps,
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vpextrb, vpextrd, vpextrq, vpextrw,
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vpinsrb, vpinsrd, vpinsrq, vpinsrw,
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vpmaxsb, vpmaxsd, vpmaxsw, vpmaxub, vpmaxud, vpmaxuw,
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vpminsb, vpminsd, vpminsw, vpminub, vpminud, vpminuw,
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vpmaddubsw,
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vpmovmskb,
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vpmovsxbd, vpmovsxbq, vpmovsxbw, vpmovsxdq, vpmovsxwd, vpmovsxwq,
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vpmovzxbd, vpmovzxbq, vpmovzxbw, vpmovzxdq, vpmovzxwd, vpmovzxwq,
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vpmulhw, vpmulld, vpmullw,
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vpmuldq, vpmulhrsw, vpmulhw, vpmulld, vpmullw, vpmuludq,
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vpor,
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vpshufb, vpshufd, vpshufhw, vpshuflw,
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vpsignb, vpsignd, vpsignw,
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vpslld, vpslldq, vpsllq, vpsllw,
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vpsrad, vpsraq, vpsraw,
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vpsrld, vpsrldq, vpsrlq, vpsrlw,
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@ -779,7 +792,7 @@ pub const Op = enum {
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pub fn isImmediate(op: Op) bool {
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// zig fmt: off
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return switch (op) {
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.imm8, .imm16, .imm32, .imm64,
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.imm8, .imm16, .imm32, .imm64,
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.imm8s, .imm16s, .imm32s,
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.rel8, .rel16, .rel32,
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.unity,
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@ -986,6 +999,7 @@ pub const Feature = enum {
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sse,
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sse2,
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sse3,
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@"sse3 x87",
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sse4_1,
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sse4_2,
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ssse3,
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@ -567,7 +567,7 @@ fn emit(lower: *Lower, prefix: Prefix, mnemonic: Mnemonic, ops: []const Operand)
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}
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fn generic(lower: *Lower, inst: Mir.Inst) Error!void {
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@setEvalBranchQuota(2_500);
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@setEvalBranchQuota(2_600);
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const fixes = switch (inst.ops) {
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.none => inst.data.none.fixes,
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.inst => inst.data.inst.fixes,
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@ -386,7 +386,10 @@ pub const Inst = struct {
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/// Packed ___ Quadword
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p_q,
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/// Packed ___ Double Quadword
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/// Packed ___ Doubleword to Quadword
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p_dq,
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/// Packed ___ Unsigned Doubleword to Quadword
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p_udq,
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/// ___ Aligned Packed Integer Values
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_dqa,
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/// ___ Unaligned Packed Integer Values
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@ -446,7 +449,10 @@ pub const Inst = struct {
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/// VEX-Encoded Packed ___ Quadword
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vp_q,
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/// VEX-Encoded Packed ___ Double Quadword
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/// VEX-Encoded Packed ___ Doubleword to Quadword
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vp_dq,
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/// VEX-Encoded Packed ___ Unsigned Doubleword to Quadword
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vp_udq,
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/// VEX-Encoded ___ Scalar Single-Precision Values
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v_ss,
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/// VEX-Encoded ___ Packed Single-Precision Values
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@ -663,6 +669,8 @@ pub const Inst = struct {
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/// Multiply scalar single-precision floating-point values
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/// Multiply packed double-precision floating-point values
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/// Multiply scalar double-precision floating-point values
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/// Multiply packed unsigned doubleword integers
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/// Multiply packed doubleword integers
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mul,
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/// Two's complement negation
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neg,
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@ -1160,10 +1160,6 @@
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.{ .fistp, .m, .{ .m32 }, .{ 0xdb }, 3, .none, .x87 },
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.{ .fistp, .m, .{ .m64 }, .{ 0xdf }, 7, .none, .x87 },
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.{ .fisttp, .m, .{ .m16 }, .{ 0xdf }, 1, .none, .x87 },
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.{ .fisttp, .m, .{ .m32 }, .{ 0xdb }, 1, .none, .x87 },
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.{ .fisttp, .m, .{ .m64 }, .{ 0xdd }, 1, .none, .x87 },
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.{ .fld, .m, .{ .m32 }, .{ 0xd9 }, 0, .none, .x87 },
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.{ .fld, .m, .{ .m64 }, .{ 0xdd }, 0, .none, .x87 },
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.{ .fld, .m, .{ .m80 }, .{ 0xdb }, 5, .none, .x87 },
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@ -1540,6 +1536,8 @@
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.{ .pmullw, .rm, .{ .xmm, .xmm_m128 }, .{ 0x66, 0x0f, 0xd5 }, 0, .none, .sse2 },
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.{ .pmuludq, .rm, .{ .xmm, .xmm_m128 }, .{ 0x66, 0x0f, 0xf4 }, 0, .none, .sse2 },
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.{ .por, .rm, .{ .xmm, .xmm_m128 }, .{ 0x66, 0x0f, 0xeb }, 0, .none, .sse2 },
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.{ .pshufd, .rmi, .{ .xmm, .xmm_m128, .imm8 }, .{ 0x66, 0x0f, 0x70 }, 0, .none, .sse2 },
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@ -1618,6 +1616,10 @@
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.{ .addsubps, .rm, .{ .xmm, .xmm_m128 }, .{ 0xf2, 0x0f, 0xd0 }, 0, .none, .sse3 },
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.{ .fisttp, .m, .{ .m16 }, .{ 0xdf }, 1, .none, .@"sse3 x87" },
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.{ .fisttp, .m, .{ .m32 }, .{ 0xdb }, 1, .none, .@"sse3 x87" },
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.{ .fisttp, .m, .{ .m64 }, .{ 0xdd }, 1, .none, .@"sse3 x87" },
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.{ .haddpd, .rm, .{ .xmm, .xmm_m128 }, .{ 0x66, 0x0f, 0x7c }, 0, .none, .sse3 },
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.{ .haddps, .rm, .{ .xmm, .xmm_m128 }, .{ 0xf2, 0x0f, 0x7c }, 0, .none, .sse3 },
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@ -1708,6 +1710,8 @@
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.{ .pmovzxwq, .rm, .{ .xmm, .xmm_m32 }, .{ 0x66, 0x0f, 0x38, 0x34 }, 0, .none, .sse4_1 },
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.{ .pmovzxdq, .rm, .{ .xmm, .xmm_m64 }, .{ 0x66, 0x0f, 0x38, 0x35 }, 0, .none, .sse4_1 },
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.{ .pmuldq, .rm, .{ .xmm, .xmm_m128 }, .{ 0x66, 0x0f, 0x38, 0x28 }, 0, .none, .sse4_1 },
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.{ .pmulld, .rm, .{ .xmm, .xmm_m128 }, .{ 0x66, 0x0f, 0x38, 0x40 }, 0, .none, .sse4_1 },
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.{ .ptest, .rm, .{ .xmm, .xmm_m128 }, .{ 0x66, 0x0f, 0x38, 0x17 }, 0, .none, .sse4_1 },
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@ -2166,12 +2170,16 @@
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.{ .vpmovzxwq, .rm, .{ .xmm, .xmm_m32 }, .{ 0x66, 0x0f, 0x38, 0x34 }, 0, .vex_128_wig, .avx },
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.{ .vpmovzxdq, .rm, .{ .xmm, .xmm_m64 }, .{ 0x66, 0x0f, 0x38, 0x35 }, 0, .vex_128_wig, .avx },
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.{ .vpmuldq, .rvm, .{ .xmm, .xmm, .xmm_m128 }, .{ 0x66, 0x0f, 0x38, 0x28 }, 0, .vex_128_wig, .avx },
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.{ .vpmulhw, .rvm, .{ .xmm, .xmm, .xmm_m128 }, .{ 0x66, 0x0f, 0xe5 }, 0, .vex_128_wig, .avx },
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.{ .vpmulld, .rvm, .{ .xmm, .xmm, .xmm_m128 }, .{ 0x66, 0x0f, 0x38, 0x40 }, 0, .vex_128_wig, .avx },
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.{ .vpmullw, .rvm, .{ .xmm, .xmm, .xmm_m128 }, .{ 0x66, 0x0f, 0xd5 }, 0, .vex_128_wig, .avx },
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.{ .vpmuludq, .rvm, .{ .xmm, .xmm, .xmm_m128 }, .{ 0x66, 0x0f, 0xf4 }, 0, .vex_128_wig, .avx },
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.{ .vpor, .rvm, .{ .xmm, .xmm, .xmm_m128 }, .{ 0x66, 0x0f, 0xeb }, 0, .vex_128_wig, .avx },
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.{ .vpshufb, .rvm, .{ .xmm, .xmm, .xmm_m128 }, .{ 0x66, 0x0f, 0x38, 0x00 }, 0, .vex_128_wig, .avx },
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@ -2493,12 +2501,16 @@
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.{ .vpmovzxwq, .rm, .{ .ymm, .xmm_m64 }, .{ 0x66, 0x0f, 0x38, 0x34 }, 0, .vex_256_wig, .avx2 },
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.{ .vpmovzxdq, .rm, .{ .ymm, .xmm_m128 }, .{ 0x66, 0x0f, 0x38, 0x35 }, 0, .vex_256_wig, .avx2 },
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.{ .vpmuldq, .rvm, .{ .ymm, .ymm, .ymm_m256 }, .{ 0x66, 0x0f, 0x38, 0x28 }, 0, .vex_256_wig, .avx2 },
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.{ .vpmulhw, .rvm, .{ .ymm, .ymm, .ymm_m256 }, .{ 0x66, 0x0f, 0xe5 }, 0, .vex_256_wig, .avx2 },
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.{ .vpmulld, .rvm, .{ .ymm, .ymm, .ymm_m256 }, .{ 0x66, 0x0f, 0x38, 0x40 }, 0, .vex_256_wig, .avx2 },
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.{ .vpmullw, .rvm, .{ .ymm, .ymm, .ymm_m256 }, .{ 0x66, 0x0f, 0xd5 }, 0, .vex_256_wig, .avx2 },
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.{ .vpmuludq, .rvm, .{ .ymm, .ymm, .ymm_m256 }, .{ 0x66, 0x0f, 0xf4 }, 0, .vex_256_wig, .avx2 },
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.{ .vpor, .rvm, .{ .ymm, .ymm, .ymm_m256 }, .{ 0x66, 0x0f, 0xeb }, 0, .vex_256_wig, .avx2 },
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.{ .vpshufb, .rvm, .{ .ymm, .ymm, .ymm_m256 }, .{ 0x66, 0x0f, 0x38, 0x00 }, 0, .vex_256_wig, .avx2 },
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@ -4889,6 +4889,14 @@ test reduceAdd {
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try test_reduce_add.testIntVectors();
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}
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inline fn reduceMul(comptime Type: type, rhs: Type) @typeInfo(Type).vector.child {
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return @reduce(.Mul, rhs);
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}
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test reduceMul {
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const test_reduce_mul = unary(reduceMul, .{});
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try test_reduce_mul.testIntVectors();
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}
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inline fn splat(comptime Type: type, rhs: Type) Type {
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return @splat(rhs[0]);
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}
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