std.Target: Remove ObjectFormat.nvptx (and associated linker code).

Textual PTX is just assembly language like any other. And if we do ever add
support for emitting PTX object files after reverse engineering the bytecode
format, we'd be emitting ELF files like the CUDA toolchain. So there's really no
need for a special ObjectFormat tag here, nor linker code that treats it as a
distinct format.

CMakeLists.txt

@@ -640,7 +640,6 @@ set(ZIG_STAGE2_SOURCES
     src/link/MachO/synthetic.zig
     src/link/MachO/Thunk.zig
     src/link/MachO/uuid.zig
-    src/link/NvPtx.zig
     src/link/Plan9.zig
     src/link/Plan9/aout.zig
     src/link/SpirV.zig

lib/std/Target.zig

@@ -1017,8 +1017,6 @@ pub const ObjectFormat = enum {
     hex,
     /// The Mach object format used by macOS and other Apple platforms.
     macho,
-    /// Nvidia's PTX (Parallel Thread Execution) assembly language.
-    nvptx,
     /// The a.out format used by Plan 9 from Bell Labs.
     plan9,
     /// Machine code with no metadata.
@@ -1039,7 +1037,6 @@ pub const ObjectFormat = enum {
             .coff => ".obj",
             .elf, .goff, .macho, .wasm, .xcoff => ".o",
             .hex => ".ihex",
-            .nvptx => ".ptx",
             .plan9 => arch.plan9Ext(),
             .raw => ".bin",
             .spirv => ".spv",
@@ -1054,7 +1051,6 @@ pub const ObjectFormat = enum {
             .uefi, .windows => .coff,
             .zos => .goff,
             else => switch (arch) {
-                .nvptx, .nvptx64 => .nvptx,
                 .spirv, .spirv32, .spirv64 => .spirv,
                 .wasm32, .wasm64 => .wasm,
                 else => .elf,

lib/std/zig.zig

@@ -232,7 +232,6 @@ pub fn binNameAlloc(allocator: Allocator, options: BinNameOptions) error{OutOfMe
                 t.libPrefix(), root_name,
             }),
         },
-        .nvptx => return std.fmt.allocPrint(allocator, "{s}.ptx", .{root_name}),
     }
 }
 

src/Compilation/Config.zig

@@ -434,7 +434,7 @@ pub fn resolve(options: Options) ResolveError!Config {
                 .windows, .uefi => .code_view,
                 else => .{ .dwarf = .@"32" },
             },
-            .spirv, .nvptx, .hex, .raw, .plan9 => .strip,
+            .spirv, .hex, .raw, .plan9 => .strip,
         };
     };
 

src/codegen.zig

@@ -666,7 +666,6 @@ fn lowerUavRef(
     switch (lf.tag) {
         .c => unreachable,
         .spirv => unreachable,
-        .nvptx => unreachable,
         .wasm => {
             dev.check(link.File.Tag.wasm.devFeature());
             const wasm = lf.cast(.wasm).?;
@@ -739,7 +738,6 @@ fn lowerNavRef(
     switch (lf.tag) {
         .c => unreachable,
         .spirv => unreachable,
-        .nvptx => unreachable,
         .wasm => {
             dev.check(link.File.Tag.wasm.devFeature());
             const wasm = lf.cast(.wasm).?;

src/dev.zig

@@ -81,7 +81,6 @@ pub const Env = enum {
                 .wasm_linker,
                 .spirv_linker,
                 .plan9_linker,
-                .nvptx_linker,
                 .goff_linker,
                 .xcoff_linker,
                 => true,
@@ -229,7 +228,6 @@ pub const Feature = enum {
     wasm_linker,
     spirv_linker,
     plan9_linker,
-    nvptx_linker,
     goff_linker,
     xcoff_linker,
 };

src/link.zig

@@ -597,7 +597,7 @@ pub const File = struct {
                     .mode = determineMode(use_lld, output_mode, link_mode),
                 });
             },
-            .c, .spirv, .nvptx => dev.checkAny(&.{ .c_linker, .spirv_linker, .nvptx_linker }),
+            .c, .spirv => dev.checkAny(&.{ .c_linker, .spirv_linker }),
         }
     }
 
@@ -670,7 +670,7 @@ pub const File = struct {
                     }
                 }
             },
-            .c, .spirv, .nvptx => dev.checkAny(&.{ .c_linker, .spirv_linker, .nvptx_linker }),
+            .c, .spirv => dev.checkAny(&.{ .c_linker, .spirv_linker }),
         }
     }
 
@@ -697,7 +697,6 @@ pub const File = struct {
             .plan9 => unreachable,
             .spirv => unreachable,
             .c => unreachable,
-            .nvptx => unreachable,
             inline else => |tag| {
                 dev.check(tag.devFeature());
                 return @as(*tag.Type(), @fieldParentPtr("base", base)).getGlobalSymbol(name, lib_name);
@@ -766,7 +765,7 @@ pub const File = struct {
         }
 
         switch (base.tag) {
-            .spirv, .nvptx => {},
+            .spirv => {},
             .goff, .xcoff => {},
             inline else => |tag| {
                 dev.check(tag.devFeature());
@@ -901,7 +900,6 @@ pub const File = struct {
         switch (base.tag) {
             .c => unreachable,
             .spirv => unreachable,
-            .nvptx => unreachable,
             .wasm => unreachable,
             .goff, .xcoff => unreachable,
             inline else => |tag| {
@@ -921,7 +919,6 @@ pub const File = struct {
         switch (base.tag) {
             .c => unreachable,
             .spirv => unreachable,
-            .nvptx => unreachable,
             .wasm => unreachable,
             .goff, .xcoff => unreachable,
             inline else => |tag| {
@@ -935,7 +932,6 @@ pub const File = struct {
         switch (base.tag) {
             .c => unreachable,
             .spirv => unreachable,
-            .nvptx => unreachable,
             .wasm => unreachable,
             .goff, .xcoff => unreachable,
             inline else => |tag| {
@@ -953,7 +949,6 @@ pub const File = struct {
         switch (base.tag) {
             .plan9,
             .spirv,
-            .nvptx,
             .goff,
             .xcoff,
             => {},
@@ -1251,7 +1246,6 @@ pub const File = struct {
         wasm,
         spirv,
         plan9,
-        nvptx,
         goff,
         xcoff,
 
@@ -1264,7 +1258,6 @@ pub const File = struct {
                 .wasm => Wasm,
                 .spirv => SpirV,
                 .plan9 => Plan9,
-                .nvptx => NvPtx,
                 .goff => Goff,
                 .xcoff => Xcoff,
             };
@@ -1279,7 +1272,6 @@ pub const File = struct {
                 .plan9 => .plan9,
                 .c => .c,
                 .spirv => .spirv,
-                .nvptx => .nvptx,
                 .goff => .goff,
                 .xcoff => .xcoff,
                 .hex => @panic("TODO implement hex object format"),
@@ -1386,7 +1378,6 @@ pub const File = struct {
     pub const MachO = @import("link/MachO.zig");
     pub const SpirV = @import("link/SpirV.zig");
     pub const Wasm = @import("link/Wasm.zig");
-    pub const NvPtx = @import("link/NvPtx.zig");
     pub const Goff = @import("link/Goff.zig");
     pub const Xcoff = @import("link/Xcoff.zig");
     pub const Dwarf = @import("link/Dwarf.zig");

src/link/NvPtx.zig

@@ -1,123 +0,0 @@
-//! NVidia PTX (Parallel Thread Execution)
-//! https://docs.nvidia.com/cuda/parallel-thread-execution/index.html
-//! For this we rely on the nvptx backend of LLVM
-//! Kernel functions need to be marked both as "export" and "callconv(.kernel)"
-
-const NvPtx = @This();
-
-const std = @import("std");
-const builtin = @import("builtin");
-
-const Allocator = std.mem.Allocator;
-const assert = std.debug.assert;
-const log = std.log.scoped(.link);
-const Path = std.Build.Cache.Path;
-
-const Zcu = @import("../Zcu.zig");
-const InternPool = @import("../InternPool.zig");
-const Compilation = @import("../Compilation.zig");
-const link = @import("../link.zig");
-const trace = @import("../tracy.zig").trace;
-const build_options = @import("build_options");
-const Air = @import("../Air.zig");
-const Liveness = @import("../Liveness.zig");
-const LlvmObject = @import("../codegen/llvm.zig").Object;
-
-base: link.File,
-llvm_object: LlvmObject.Ptr,
-
-pub fn createEmpty(
-    arena: Allocator,
-    comp: *Compilation,
-    emit: Path,
-    options: link.File.OpenOptions,
-) !*NvPtx {
-    const target = comp.root_mod.resolved_target.result;
-    const use_lld = build_options.have_llvm and comp.config.use_lld;
-    const use_llvm = comp.config.use_llvm;
-
-    assert(use_llvm); // Caught by Compilation.Config.resolve.
-    assert(!use_lld); // Caught by Compilation.Config.resolve.
-    assert(target.cpu.arch.isNvptx()); // Caught by Compilation.Config.resolve.
-
-    switch (target.os.tag) {
-        // TODO: does it also work with nvcl ?
-        .cuda => {},
-        else => return error.PtxArchNotSupported,
-    }
-
-    const llvm_object = try LlvmObject.create(arena, comp);
-    const nvptx = try arena.create(NvPtx);
-    nvptx.* = .{
-        .base = .{
-            .tag = .nvptx,
-            .comp = comp,
-            .emit = emit,
-            .zcu_object_sub_path = emit.sub_path,
-            .gc_sections = options.gc_sections orelse false,
-            .print_gc_sections = options.print_gc_sections,
-            .stack_size = options.stack_size orelse 0,
-            .allow_shlib_undefined = options.allow_shlib_undefined orelse false,
-            .file = null,
-            .disable_lld_caching = options.disable_lld_caching,
-            .build_id = options.build_id,
-        },
-        .llvm_object = llvm_object,
-    };
-
-    return nvptx;
-}
-
-pub fn open(
-    arena: Allocator,
-    comp: *Compilation,
-    emit: Path,
-    options: link.File.OpenOptions,
-) !*NvPtx {
-    const target = comp.root_mod.resolved_target.result;
-    assert(target.ofmt == .nvptx);
-    return createEmpty(arena, comp, emit, options);
-}
-
-pub fn deinit(self: *NvPtx) void {
-    self.llvm_object.deinit();
-}
-
-pub fn updateFunc(
-    self: *NvPtx,
-    pt: Zcu.PerThread,
-    func_index: InternPool.Index,
-    air: Air,
-    liveness: Liveness,
-) link.File.UpdateNavError!void {
-    try self.llvm_object.updateFunc(pt, func_index, air, liveness);
-}
-
-pub fn updateNav(self: *NvPtx, pt: Zcu.PerThread, nav: InternPool.Nav.Index) link.File.UpdateNavError!void {
-    return self.llvm_object.updateNav(pt, nav);
-}
-
-pub fn updateExports(
-    self: *NvPtx,
-    pt: Zcu.PerThread,
-    exported: Zcu.Exported,
-    export_indices: []const Zcu.Export.Index,
-) !void {
-    if (build_options.skip_non_native and builtin.object_format != .nvptx)
-        @panic("Attempted to compile for object format that was disabled by build configuration");
-
-    return self.llvm_object.updateExports(pt, exported, export_indices);
-}
-
-pub fn flush(self: *NvPtx, arena: Allocator, tid: Zcu.PerThread.Id, prog_node: std.Progress.Node) link.File.FlushError!void {
-    return self.flushModule(arena, tid, prog_node);
-}
-
-pub fn flushModule(self: *NvPtx, arena: Allocator, tid: Zcu.PerThread.Id, prog_node: std.Progress.Node) link.File.FlushError!void {
-    if (build_options.skip_non_native)
-        @panic("Attempted to compile for architecture that was disabled by build configuration");
-
-    _ = tid;
-
-    try self.base.emitLlvmObject(arena, self.llvm_object, prog_node);
-}

src/target.zig

@@ -140,7 +140,6 @@ pub fn hasLlvmSupport(target: std.Target, ofmt: std.Target.ObjectFormat) bool {
         .goff,
         .hex,
         .macho,
-        .nvptx,
         .spirv,
         .raw,
         .wasm,