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test: remove ad-hoc nvptx tests

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These were just testing random things in the LLVM NVPTX backend. That's not
really our job.
This commit is contained in:
Alex Rønne Petersen 2025-10-04 20:41:26 +02:00
parent c68f9bc207
commit 95417948d0
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2 changed files with 0 additions and 106 deletions
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1
test/cases.zig
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@ -12,5 +12,4 @@ pub const BuildOptions = struct {
pub fn addCases(cases: *Cases, build_options: BuildOptions, b: *std.Build) !void {
try @import("compile_errors.zig").addCases(cases, b);
try @import("llvm_targets.zig").addCases(cases, build_options, b);
try @import("nvptx.zig").addCases(cases, b);
}

105
test/nvptx.zig
View file

@ -1,105 +0,0 @@
const std = @import("std");
const Cases = @import("src/Cases.zig");
pub fn addCases(ctx: *Cases, b: *std.Build) !void {
const target = b.resolveTargetQuery(.{
.cpu_arch = .nvptx64,
.os_tag = .cuda,
});
{
var case = addPtx(ctx, target, "simple addition and subtraction");
case.addCompile(
\\fn add(a: i32, b: i32) i32 {
\\ return a + b;
\\}
\\
\\pub export fn add_and_substract(a: i32, out: *i32) callconv(.kernel) void {
\\ const x = add(a, 7);
\\ var y = add(2, 0);
\\ y -= x;
\\ out.* = y;
\\}
);
}
{
var case = addPtx(ctx, target, "read special registers");
case.addCompile(
\\fn threadIdX() u32 {
\\ return asm ("mov.u32 \t%[r], %tid.x;"
\\ : [r] "=r" (-> u32),
\\ );
\\}
\\
\\pub export fn special_reg(a: []const i32, out: []i32) callconv(.kernel) void {
\\ const i = threadIdX();
\\ out[i] = a[i] + 7;
\\}
);
}
{
var case = addPtx(ctx, target, "address spaces");
case.addCompile(
\\var x: i32 addrspace(.global) = 0;
\\
\\pub export fn increment(out: *i32) callconv(.kernel) void {
\\ x += 1;
\\ out.* = x;
\\}
);
}
{
var case = addPtx(ctx, target, "reduce in shared mem");
case.addCompile(
\\fn threadIdX() u32 {
\\ return asm ("mov.u32 \t%[r], %tid.x;"
\\ : [r] "=r" (-> u32),
\\ );
\\}
\\
\\ var _sdata: [1024]f32 addrspace(.shared) = undefined;
\\ pub export fn reduceSum(d_x: []const f32, out: *f32) callconv(.kernel) void {
\\ var sdata: *addrspace(.generic) [1024]f32 = @addrSpaceCast(&_sdata);
\\ const tid: u32 = threadIdX();
\\ var sum = d_x[tid];
\\ sdata[tid] = sum;
\\ asm volatile ("bar.sync \t0;");
\\ var s: u32 = 512;
\\ while (s > 0) : (s = s >> 1) {
\\ if (tid < s) {
\\ sum += sdata[tid + s];
\\ sdata[tid] = sum;
\\ }
\\ asm volatile ("bar.sync \t0;");
\\ }
\\
\\ if (tid == 0) {
\\ out.* = sum;
\\ }
\\ }
);
}
}
fn addPtx(ctx: *Cases, target: std.Build.ResolvedTarget, name: []const u8) *Cases.Case {
ctx.cases.append(.{
.name = name,
.target = target,
.files = .init(ctx.arena),
.case = null,
.output_mode = .Obj,
.deps = .init(ctx.arena),
.link_libc = false,
.emit_bin = false,
.backend = .llvm,
// Bug in Debug mode
.optimize_mode = .ReleaseSafe,
}) catch @panic("out of memory");
return &ctx.cases.items[ctx.cases.items.len - 1];
}