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std.debug: add riscv32-linux and riscv64-linux unwind support
This commit is contained in:
Alex Rønne Petersen
parent
8520e9312e
commit
97de46dc16
3 changed files with 111 additions and 4 deletions
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@ -1432,6 +1432,7 @@ pub fn ipRegNum(arch: std.Target.Cpu.Arch) ?u16 {
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.aarch64, .aarch64_be => 32,
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.arm, .armeb, .thumb, .thumbeb => 15,
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.loongarch32, .loongarch64 => 32,
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.riscv32, .riscv32be, .riscv64, .riscv64be => 32,
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.x86 => 8,
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.x86_64 => 16,
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else => null,
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@ -1443,6 +1444,7 @@ pub fn fpRegNum(arch: std.Target.Cpu.Arch) u16 {
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.aarch64, .aarch64_be => 29,
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.arm, .armeb, .thumb, .thumbeb => 11,
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.loongarch32, .loongarch64 => 22,
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.riscv32, .riscv32be, .riscv64, .riscv64be => 8,
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.x86 => 5,
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.x86_64 => 6,
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else => unreachable,
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@ -1454,6 +1456,7 @@ pub fn spRegNum(arch: std.Target.Cpu.Arch) u16 {
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.aarch64, .aarch64_be => 31,
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.arm, .armeb, .thumb, .thumbeb => 13,
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.loongarch32, .loongarch64 => 3,
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.riscv32, .riscv32be, .riscv64, .riscv64be => 2,
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.x86 => 4,
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.x86_64 => 7,
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else => unreachable,
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@ -1473,10 +1476,6 @@ pub fn supportsUnwinding(target: *const std.Target) bool {
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.spirv64,
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=> false,
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// Enabling this causes relocation errors such as:
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// error: invalid relocation type R_RISCV_SUB32 at offset 0x20
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.riscv64, .riscv64be, .riscv32, .riscv32be => false,
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// Conservative guess. Feel free to update this logic with any targets
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// that are known to not support Dwarf unwinding.
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else => true,
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@ -88,6 +88,8 @@ pub const can_unwind: bool = s: {
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.aarch64,
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.aarch64_be,
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.loongarch64,
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.riscv32,
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.riscv64,
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.x86,
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.x86_64,
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},
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@ -7,6 +7,7 @@ else switch (native_arch) {
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.aarch64, .aarch64_be => Aarch64,
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.arm, .armeb, .thumb, .thumbeb => Arm,
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.loongarch32, .loongarch64 => LoongArch,
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.riscv32, .riscv32be, .riscv64, .riscv64be => Riscv,
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.x86 => X86,
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.x86_64 => X86_64,
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else => noreturn,
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@ -181,6 +182,13 @@ pub fn fromPosixSignalContext(ctx_ptr: ?*const anyopaque) ?Native {
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},
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else => null,
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},
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.riscv32, .riscv64 => switch (builtin.os.tag) {
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.linux => .{
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.r = [1]usize{0} ++ uc.mcontext.gregs[1..].*, // r0 position is used for pc; replace with zero
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.pc = uc.mcontext.gregs[0],
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},
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else => null,
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},
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else => null,
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};
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}
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@ -571,6 +579,104 @@ pub const LoongArch = extern struct {
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}
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};
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/// This is an `extern struct` so that inline assembly in `current` can use field offsets.
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pub const Riscv = extern struct {
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/// The numbered general-purpose registers r0 - r31. r0 must be zero.
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r: [32]usize,
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pc: usize,
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pub inline fn current() Riscv {
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var ctx: Riscv = undefined;
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asm volatile (if (@sizeOf(usize) == 8)
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\\ sd zero, 0(t0)
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\\ sd ra, 8(t0)
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\\ sd sp, 16(t0)
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\\ sd gp, 24(t0)
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\\ sd tp, 32(t0)
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\\ sd t0, 40(t0)
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\\ sd t1, 48(t0)
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\\ sd t2, 56(t0)
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\\ sd s0, 64(t0)
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\\ sd s1, 72(t0)
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\\ sd a0, 80(t0)
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\\ sd a1, 88(t0)
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\\ sd a2, 96(t0)
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\\ sd a3, 104(t0)
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\\ sd a4, 112(t0)
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\\ sd a5, 120(t0)
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\\ sd a6, 128(t0)
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\\ sd a7, 136(t0)
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\\ sd s2, 144(t0)
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\\ sd s3, 152(t0)
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\\ sd s4, 160(t0)
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\\ sd s5, 168(t0)
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\\ sd s6, 176(t0)
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\\ sd s7, 184(t0)
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\\ sd s8, 192(t0)
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\\ sd s9, 200(t0)
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\\ sd s10, 208(t0)
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\\ sd s11, 216(t0)
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\\ sd t3, 224(t0)
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\\ sd t4, 232(t0)
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\\ sd t5, 240(t0)
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\\ sd t6, 248(t0)
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\\ jal ra, 1f
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\\1:
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\\ sd ra, 256(t0)
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\\ ld ra, 8(t0)
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else
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\\ sw zero, 0(t0)
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\\ sw ra, 4(t0)
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\\ sw sp, 8(t0)
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\\ sw gp, 12(t0)
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\\ sw tp, 16(t0)
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\\ sw t0, 20(t0)
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\\ sw t1, 24(t0)
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\\ sw t2, 28(t0)
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\\ sw s0, 32(t0)
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\\ sw s1, 36(t0)
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\\ sw a0, 40(t0)
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\\ sw a1, 44(t0)
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\\ sw a2, 48(t0)
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\\ sw a3, 52(t0)
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\\ sw a4, 56(t0)
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\\ sw a5, 60(t0)
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\\ sw a6, 64(t0)
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\\ sw a7, 68(t0)
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\\ sw s2, 72(t0)
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\\ sw s3, 76(t0)
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\\ sw s4, 80(t0)
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\\ sw s5, 84(t0)
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\\ sw s6, 88(t0)
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\\ sw s7, 92(t0)
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\\ sw s8, 96(t0)
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\\ sw s9, 100(t0)
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\\ sw s10, 104(t0)
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\\ sw s11, 108(t0)
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\\ sw t3, 112(t0)
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\\ sw t4, 116(t0)
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\\ sw t5, 120(t0)
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\\ sw t6, 124(t0)
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\\ jal ra, 1f
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\\1:
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\\ sw ra, 128(t0)
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\\ lw ra, 4(t0)
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:
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: [gprs] "{t0}" (&ctx),
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: .{ .memory = true });
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return ctx;
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}
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pub fn dwarfRegisterBytes(ctx: *Riscv, register_num: u16) DwarfRegisterError![]u8 {
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switch (register_num) {
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0...31 => return @ptrCast(&ctx.r[register_num]),
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32 => return @ptrCast(&ctx.pc),
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else => return error.InvalidRegister,
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}
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}
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};
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const signal_ucontext_t = switch (native_os) {
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.linux => std.os.linux.ucontext_t,
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.emscripten => std.os.emscripten.ucontext_t,
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