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make crc32 a featdep of sse4.2

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To my knowledge there isn't an implementation of `sse4.2` that doesn't have `crc32`.
The Clang driver also sets `crc32` to be implicitly enabled when an explicit `-crc32`
wasn't provided. This matches that behaviour.

We need this behaviour to compile libraries like `rocksdb` which currently guard against
`crc32` intrinsics by checking for `sse4.2`.
This commit is contained in:
David Rubin 2024-11-24 22:25:32 -08:00
parent bc3ed51b7f
commit 9e17e097e5
No known key found for this signature in database
GPG key ID: 2EBEA24BA674C720
2 changed files with 5 additions and 53 deletions
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54
lib/std/Target/x86.zig
View file

@ -1162,6 +1162,7 @@ pub const all_features = blk: {
.llvm_name = "sse4.2",
.description = "Enable SSE 4.2 instructions",
.dependencies = featureSet(&[_]Feature{
.crc32,
.sse4_1,
}),
};
@ -1328,7 +1329,6 @@ pub const cpu = struct {
.clflushopt,
.clwb,
.cmov,
.crc32,
.cx16,
.f16c,
.false_deps_perm,
@ -1424,7 +1424,6 @@ pub const cpu = struct {
.clwb,
.cmov,
.cmpccxadd,
.crc32,
.cx16,
.enqcmd,
.f16c,
@ -1500,7 +1499,6 @@ pub const cpu = struct {
.clwb,
.cmov,
.cmpccxadd,
.crc32,
.cx16,
.enqcmd,
.f16c,
@ -1735,7 +1733,6 @@ pub const cpu = struct {
.aes,
.clflushopt,
.cmov,
.crc32,
.cx16,
.false_deps_popcnt,
.fast_7bytenop,
@ -1799,7 +1796,6 @@ pub const cpu = struct {
.aes,
.branchfusion,
.cmov,
.crc32,
.cx16,
.fast_11bytenop,
.fast_scalar_shift_masks,
@ -1830,7 +1826,6 @@ pub const cpu = struct {
.bmi,
.branchfusion,
.cmov,
.crc32,
.cx16,
.f16c,
.fast_11bytenop,
@ -1866,7 +1861,6 @@ pub const cpu = struct {
.bmi,
.branchfusion,
.cmov,
.crc32,
.cx16,
.f16c,
.fast_11bytenop,
@ -1905,7 +1899,6 @@ pub const cpu = struct {
.bmi2,
.branchfusion,
.cmov,
.crc32,
.cx16,
.f16c,
.fast_11bytenop,
@ -1973,7 +1966,6 @@ pub const cpu = struct {
.bmi,
.bmi2,
.cmov,
.crc32,
.cx16,
.ermsb,
.f16c,
@ -2043,7 +2035,6 @@ pub const cpu = struct {
.aes,
.bmi,
.cmov,
.crc32,
.cx16,
.f16c,
.fast_15bytenop,
@ -2113,7 +2104,6 @@ pub const cpu = struct {
.bmi2,
.clflushopt,
.cmov,
.crc32,
.cx16,
.ermsb,
.evex512,
@ -2172,7 +2162,6 @@ pub const cpu = struct {
.clflushopt,
.clwb,
.cmov,
.crc32,
.cx16,
.ermsb,
.evex512,
@ -2233,7 +2222,6 @@ pub const cpu = struct {
.clwb,
.cmov,
.cmpccxadd,
.crc32,
.cx16,
.enqcmd,
.f16c,
@ -2313,7 +2301,6 @@ pub const cpu = struct {
.clflushopt,
.clwb,
.cmov,
.crc32,
.cx16,
.ermsb,
.evex512,
@ -2379,7 +2366,6 @@ pub const cpu = struct {
.features = featureSet(&[_]Feature{
.@"64bit",
.cmov,
.crc32,
.cx16,
.fxsr,
.idivq_to_divl,
@ -2419,7 +2405,6 @@ pub const cpu = struct {
.clflushopt,
.clwb,
.cmov,
.crc32,
.cx16,
.enqcmd,
.ermsb,
@ -2514,7 +2499,6 @@ pub const cpu = struct {
.aes,
.clflushopt,
.cmov,
.crc32,
.cx16,
.false_deps_popcnt,
.fast_imm16,
@ -2552,7 +2536,6 @@ pub const cpu = struct {
.aes,
.clflushopt,
.cmov,
.crc32,
.cx16,
.fast_imm16,
.fast_movbe,
@ -2596,7 +2579,6 @@ pub const cpu = struct {
.clflushopt,
.clwb,
.cmov,
.crc32,
.cx16,
.f16c,
.false_deps_popcnt,
@ -2658,7 +2640,6 @@ pub const cpu = struct {
.clwb,
.cmov,
.cmpccxadd,
.crc32,
.cx16,
.enqcmd,
.f16c,
@ -2732,7 +2713,6 @@ pub const cpu = struct {
.clflushopt,
.clwb,
.cmov,
.crc32,
.cx16,
.enqcmd,
.ermsb,
@ -2821,7 +2801,6 @@ pub const cpu = struct {
.clflushopt,
.clwb,
.cmov,
.crc32,
.cx16,
.enqcmd,
.ermsb,
@ -2892,7 +2871,6 @@ pub const cpu = struct {
.bmi,
.bmi2,
.cmov,
.crc32,
.cx16,
.ermsb,
.f16c,
@ -2984,7 +2962,6 @@ pub const cpu = struct {
.bmi2,
.clflushopt,
.cmov,
.crc32,
.cx16,
.ermsb,
.evex512,
@ -3049,7 +3026,6 @@ pub const cpu = struct {
.clflushopt,
.clwb,
.cmov,
.crc32,
.cx16,
.ermsb,
.evex512,
@ -3101,7 +3077,6 @@ pub const cpu = struct {
.features = featureSet(&[_]Feature{
.@"64bit",
.cmov,
.crc32,
.cx16,
.f16c,
.false_deps_popcnt,
@ -3214,7 +3189,6 @@ pub const cpu = struct {
.bmi,
.bmi2,
.cmov,
.crc32,
.cx16,
.evex512,
.fast_gather,
@ -3257,7 +3231,6 @@ pub const cpu = struct {
.bmi,
.bmi2,
.cmov,
.crc32,
.cx16,
.evex512,
.fast_gather,
@ -3315,7 +3288,6 @@ pub const cpu = struct {
.clwb,
.cmov,
.cmpccxadd,
.crc32,
.cx16,
.enqcmd,
.f16c,
@ -3389,7 +3361,6 @@ pub const cpu = struct {
.clflushopt,
.clwb,
.cmov,
.crc32,
.cx16,
.f16c,
.false_deps_perm,
@ -3450,7 +3421,6 @@ pub const cpu = struct {
.features = featureSet(&[_]Feature{
.@"64bit",
.cmov,
.crc32,
.cx16,
.fxsr,
.idivq_to_divl,
@ -3540,7 +3510,6 @@ pub const cpu = struct {
.clwb,
.cmov,
.cmpccxadd,
.crc32,
.cx16,
.enqcmd,
.f16c,
@ -3755,7 +3724,6 @@ pub const cpu = struct {
.clflushopt,
.clwb,
.cmov,
.crc32,
.cx16,
.f16c,
.false_deps_perm,
@ -3830,7 +3798,6 @@ pub const cpu = struct {
.bmi2,
.clflushopt,
.cmov,
.crc32,
.cx16,
.ermsb,
.evex512,
@ -3881,7 +3848,6 @@ pub const cpu = struct {
.@"64bit",
.avx,
.cmov,
.crc32,
.cx16,
.false_deps_popcnt,
.fast_15bytenop,
@ -3928,7 +3894,6 @@ pub const cpu = struct {
.clflushopt,
.clwb,
.cmov,
.crc32,
.cx16,
.enqcmd,
.ermsb,
@ -4005,7 +3970,6 @@ pub const cpu = struct {
.clwb,
.cmov,
.cmpccxadd,
.crc32,
.cx16,
.enqcmd,
.f16c,
@ -4058,7 +4022,6 @@ pub const cpu = struct {
.features = featureSet(&[_]Feature{
.@"64bit",
.cmov,
.crc32,
.cx16,
.false_deps_popcnt,
.fast_7bytenop,
@ -4102,7 +4065,6 @@ pub const cpu = struct {
.clflushopt,
.clwb,
.cmov,
.crc32,
.cx16,
.ermsb,
.evex512,
@ -4157,7 +4119,6 @@ pub const cpu = struct {
.bmi2,
.clflushopt,
.cmov,
.crc32,
.cx16,
.ermsb,
.f16c,
@ -4213,7 +4174,6 @@ pub const cpu = struct {
.clflushopt,
.clwb,
.cmov,
.crc32,
.cx16,
.ermsb,
.evex512,
@ -4261,7 +4221,6 @@ pub const cpu = struct {
.features = featureSet(&[_]Feature{
.@"64bit",
.cmov,
.crc32,
.cx16,
.false_deps_popcnt,
.fast_7bytenop,
@ -4310,7 +4269,6 @@ pub const cpu = struct {
.clflushopt,
.clwb,
.cmov,
.crc32,
.cx16,
.ermsb,
.evex512,
@ -4366,7 +4324,6 @@ pub const cpu = struct {
.clflushopt,
.clwb,
.cmov,
.crc32,
.cx16,
.fast_imm16,
.fast_movbe,
@ -4404,7 +4361,6 @@ pub const cpu = struct {
.features = featureSet(&[_]Feature{
.@"64bit",
.cmov,
.crc32,
.cx16,
.fxsr,
.idivq_to_divl,
@ -4466,7 +4422,6 @@ pub const cpu = struct {
.features = featureSet(&[_]Feature{
.@"64bit",
.cmov,
.crc32,
.cx16,
.false_deps_popcnt,
.fast_15bytenop,
@ -4496,7 +4451,6 @@ pub const cpu = struct {
.bmi,
.bmi2,
.cmov,
.crc32,
.cx16,
.f16c,
.false_deps_lzcnt_tzcnt,
@ -4535,7 +4489,6 @@ pub const cpu = struct {
.bmi,
.bmi2,
.cmov,
.crc32,
.cx16,
.evex512,
.false_deps_popcnt,
@ -4592,7 +4545,6 @@ pub const cpu = struct {
.clflushopt,
.clzero,
.cmov,
.crc32,
.cx16,
.f16c,
.fast_15bytenop,
@ -4646,7 +4598,6 @@ pub const cpu = struct {
.clwb,
.clzero,
.cmov,
.crc32,
.cx16,
.f16c,
.fast_15bytenop,
@ -4701,7 +4652,6 @@ pub const cpu = struct {
.clwb,
.clzero,
.cmov,
.crc32,
.cx16,
.f16c,
.fast_15bytenop,
@ -4771,7 +4721,6 @@ pub const cpu = struct {
.clwb,
.clzero,
.cmov,
.crc32,
.cx16,
.evex512,
.fast_15bytenop,
@ -4845,7 +4794,6 @@ pub const cpu = struct {
.clwb,
.clzero,
.cmov,
.crc32,
.cx16,
.evex512,
.fast_15bytenop,

4
tools/update_cpu_features.zig
View file

@ -1139,6 +1139,10 @@ const llvm_targets = [_]LlvmTarget{
.llvm_name = "winchip2",
.extra_deps = &.{"3dnow"},
},
.{
.llvm_name = "sse4.2",
.extra_deps = &.{"crc32"},
},
},
// Features removed from LLVM
.extra_features = &.{