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https://codeberg.org/ziglang/zig.git
synced 2025-12-06 13:54:21 +00:00
std.meta.FieldType -> @FieldType
This commit is contained in:
parent
db7db48028
commit
aac800ec65
13 changed files with 46 additions and 46 deletions
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@ -3679,22 +3679,22 @@ void do_a_thing(struct Foo *foo) {
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<tr>
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<th scope="row">{#syntax#}.{x}{#endsyntax#}</th>
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<td>{#syntax#}T{#endsyntax#}</td>
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<td>{#syntax#}x{#endsyntax#} is a {#syntax#}std.meta.FieldType(T, .@"0"){#endsyntax#}</td>
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<td>{#syntax#}x{#endsyntax#} is a {#syntax#}@FieldType(T, "0"){#endsyntax#}</td>
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</tr>
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<tr>
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<th scope="row">{#syntax#}.{ .a = x }{#endsyntax#}</th>
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<td>{#syntax#}T{#endsyntax#}</td>
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<td>{#syntax#}x{#endsyntax#} is a {#syntax#}std.meta.FieldType(T, .a){#endsyntax#}</td>
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<td>{#syntax#}x{#endsyntax#} is a {#syntax#}@FieldType(T, "a"){#endsyntax#}</td>
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</tr>
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<tr>
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<th scope="row">{#syntax#}T{x}{#endsyntax#}</th>
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<td>-</td>
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<td>{#syntax#}x{#endsyntax#} is a {#syntax#}std.meta.FieldType(T, .@"0"){#endsyntax#}</td>
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<td>{#syntax#}x{#endsyntax#} is a {#syntax#}@FieldType(T, "0"){#endsyntax#}</td>
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</tr>
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<tr>
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<th scope="row">{#syntax#}T{ .a = x }{#endsyntax#}</th>
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<td>-</td>
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<td>{#syntax#}x{#endsyntax#} is a {#syntax#}std.meta.FieldType(T, .a){#endsyntax#}</td>
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<td>{#syntax#}x{#endsyntax#} is a {#syntax#}@FieldType(T, "a"){#endsyntax#}</td>
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</tr>
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<tr>
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<th scope="row">{#syntax#}@Type(x){#endsyntax#}</th>
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@ -394,7 +394,7 @@ pub const Node = extern union {
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}
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pub fn Data(comptime t: Tag) type {
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return std.meta.fieldInfo(t.Type(), .data).type;
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return @FieldType(t.Type(), "data");
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}
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};
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@ -2486,13 +2486,13 @@ test "reIndex" {
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test "auto store_hash" {
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const HasCheapEql = AutoArrayHashMap(i32, i32);
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const HasExpensiveEql = AutoArrayHashMap([32]i32, i32);
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try testing.expect(std.meta.fieldInfo(HasCheapEql.Data, .hash).type == void);
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try testing.expect(std.meta.fieldInfo(HasExpensiveEql.Data, .hash).type != void);
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try testing.expect(@FieldType(HasCheapEql.Data, "hash") == void);
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try testing.expect(@FieldType(HasExpensiveEql.Data, "hash") != void);
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const HasCheapEqlUn = AutoArrayHashMapUnmanaged(i32, i32);
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const HasExpensiveEqlUn = AutoArrayHashMapUnmanaged([32]i32, i32);
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try testing.expect(std.meta.fieldInfo(HasCheapEqlUn.Data, .hash).type == void);
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try testing.expect(std.meta.fieldInfo(HasExpensiveEqlUn.Data, .hash).type != void);
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try testing.expect(@FieldType(HasCheapEqlUn.Data, "hash") == void);
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try testing.expect(@FieldType(HasExpensiveEqlUn.Data, "hash") != void);
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}
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test "sort" {
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@ -565,7 +565,7 @@ pub fn MultiArrayList(comptime T: type) type {
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}
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fn FieldType(comptime field: Field) type {
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return meta.fieldInfo(Elem, field).type;
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return @FieldType(Elem, @tagName(field));
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}
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const Entry = entry: {
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@ -7526,9 +7526,9 @@ pub const Constant = enum(u32) {
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};
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}
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};
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const Mantissa64 = std.meta.FieldType(Float.Repr(f64), .mantissa);
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const Exponent32 = std.meta.FieldType(Float.Repr(f32), .exponent);
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const Exponent64 = std.meta.FieldType(Float.Repr(f64), .exponent);
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const Mantissa64 = @FieldType(Float.Repr(f64), "mantissa");
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const Exponent32 = @FieldType(Float.Repr(f32), "exponent");
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const Exponent64 = @FieldType(Float.Repr(f64), "exponent");
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const repr: Float.Repr(f32) = @bitCast(item.data);
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const denormal_shift = switch (repr.exponent) {
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@ -1512,7 +1512,7 @@ pub fn create(gpa: Allocator, arena: Allocator, options: CreateOptions) !*Compil
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.emit_asm = options.emit_asm,
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.emit_llvm_ir = options.emit_llvm_ir,
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.emit_llvm_bc = options.emit_llvm_bc,
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.work_queues = .{std.fifo.LinearFifo(Job, .Dynamic).init(gpa)} ** @typeInfo(std.meta.FieldType(Compilation, .work_queues)).array.len,
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.work_queues = @splat(.init(gpa)),
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.c_object_work_queue = std.fifo.LinearFifo(*CObject, .Dynamic).init(gpa),
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.win32_resource_work_queue = if (dev.env.supports(.win32_resource)) std.fifo.LinearFifo(*Win32Resource, .Dynamic).init(gpa) else .{},
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.astgen_work_queue = std.fifo.LinearFifo(Zcu.File.Index, .Dynamic).init(gpa),
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@ -13519,7 +13519,7 @@ fn validateErrSetSwitch(
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seen_errors: *SwitchErrorSet,
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case_vals: *std.ArrayListUnmanaged(Air.Inst.Ref),
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operand_ty: Type,
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inst_data: std.meta.FieldType(Zir.Inst.Data, .pl_node),
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inst_data: @FieldType(Zir.Inst.Data, "pl_node"),
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scalar_cases_len: u32,
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multi_cases_len: u32,
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else_case: struct { body: []const Zir.Inst.Index, end: usize, src: LazySrcLoc },
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@ -1030,8 +1030,8 @@ const mnemonic_to_encodings_map = init: {
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storage_i += value.len;
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}
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var mnemonic_i: [mnemonic_count]usize = @splat(0);
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const ops_len = @typeInfo(std.meta.FieldType(Data, .ops)).array.len;
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const opc_len = @typeInfo(std.meta.FieldType(Data, .opc)).array.len;
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const ops_len = @typeInfo(@FieldType(Data, "ops")).array.len;
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const opc_len = @typeInfo(@FieldType(Data, "opc")).array.len;
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for (encodings) |entry| {
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const i = &mnemonic_i[@intFromEnum(entry[0])];
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mnemonic_map[@intFromEnum(entry[0])][i.*] = .{
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@ -3497,9 +3497,9 @@ pub const Relocation = struct {
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const target_page = @as(i32, @intCast(ctx.target_vaddr >> 12));
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const pages = @as(u21, @bitCast(@as(i21, @intCast(target_page - source_page))));
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var inst = aarch64_util.Instruction{
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.pc_relative_address = mem.bytesToValue(std.meta.TagPayload(
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.pc_relative_address = mem.bytesToValue(@FieldType(
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aarch64_util.Instruction,
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aarch64_util.Instruction.pc_relative_address,
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@tagName(aarch64_util.Instruction.pc_relative_address),
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), buffer[0..4]),
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};
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inst.pc_relative_address.immhi = @as(u19, @truncate(pages >> 2));
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@ -3512,18 +3512,18 @@ pub const Relocation = struct {
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const narrowed = @as(u12, @truncate(@as(u64, @intCast(ctx.target_vaddr))));
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if (isArithmeticOp(buffer[0..4])) {
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var inst = aarch64_util.Instruction{
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.add_subtract_immediate = mem.bytesToValue(std.meta.TagPayload(
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.add_subtract_immediate = mem.bytesToValue(@FieldType(
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aarch64_util.Instruction,
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aarch64_util.Instruction.add_subtract_immediate,
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@tagName(aarch64_util.Instruction.add_subtract_immediate),
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), buffer[0..4]),
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};
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inst.add_subtract_immediate.imm12 = narrowed;
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mem.writeInt(u32, buffer[0..4], inst.toU32(), .little);
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} else {
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var inst = aarch64_util.Instruction{
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.load_store_register = mem.bytesToValue(std.meta.TagPayload(
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.load_store_register = mem.bytesToValue(@FieldType(
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aarch64_util.Instruction,
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aarch64_util.Instruction.load_store_register,
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@tagName(aarch64_util.Instruction.load_store_register),
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), buffer[0..4]),
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};
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const offset: u12 = blk: {
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@ -1783,9 +1783,9 @@ const aarch64 = struct {
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aarch64_util.writeAddImmInst(off, code);
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} else {
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const old_inst: Instruction = .{
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.add_subtract_immediate = mem.bytesToValue(std.meta.TagPayload(
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.add_subtract_immediate = mem.bytesToValue(@FieldType(
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Instruction,
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Instruction.add_subtract_immediate,
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@tagName(Instruction.add_subtract_immediate),
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), code),
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};
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const rd: Register = @enumFromInt(old_inst.add_subtract_immediate.rd);
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@ -1797,9 +1797,9 @@ const aarch64 = struct {
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.TLSDESC_CALL => if (!target.flags.has_tlsdesc) {
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const old_inst: Instruction = .{
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.unconditional_branch_register = mem.bytesToValue(std.meta.TagPayload(
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.unconditional_branch_register = mem.bytesToValue(@FieldType(
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Instruction,
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Instruction.unconditional_branch_register,
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@tagName(Instruction.unconditional_branch_register),
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), code),
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};
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const rn: Register = @enumFromInt(old_inst.unconditional_branch_register.rn);
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@ -794,9 +794,9 @@ fn resolveRelocInner(
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aarch64.writeAddImmInst(@truncate(target), inst_code);
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} else {
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var inst = aarch64.Instruction{
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.load_store_register = mem.bytesToValue(std.meta.TagPayload(
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.load_store_register = mem.bytesToValue(@FieldType(
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aarch64.Instruction,
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aarch64.Instruction.load_store_register,
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@tagName(aarch64.Instruction.load_store_register),
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), inst_code),
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};
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inst.load_store_register.offset = switch (inst.load_store_register.size) {
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@ -843,9 +843,9 @@ fn resolveRelocInner(
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const inst_code = code[rel_offset..][0..4];
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const reg_info: RegInfo = blk: {
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if (aarch64.isArithmeticOp(inst_code)) {
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const inst = mem.bytesToValue(std.meta.TagPayload(
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const inst = mem.bytesToValue(@FieldType(
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aarch64.Instruction,
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aarch64.Instruction.add_subtract_immediate,
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@tagName(aarch64.Instruction.add_subtract_immediate),
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), inst_code);
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break :blk .{
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.rd = inst.rd,
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@ -853,9 +853,9 @@ fn resolveRelocInner(
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.size = inst.sf,
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};
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} else {
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const inst = mem.bytesToValue(std.meta.TagPayload(
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const inst = mem.bytesToValue(@FieldType(
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aarch64.Instruction,
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aarch64.Instruction.load_store_register,
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@tagName(aarch64.Instruction.load_store_register),
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), inst_code);
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break :blk .{
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.rd = inst.rt,
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@ -5,9 +5,9 @@ pub inline fn isArithmeticOp(inst: *const [4]u8) bool {
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pub fn writeAddImmInst(value: u12, code: *[4]u8) void {
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var inst = Instruction{
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.add_subtract_immediate = mem.bytesToValue(std.meta.TagPayload(
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.add_subtract_immediate = mem.bytesToValue(@FieldType(
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Instruction,
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Instruction.add_subtract_immediate,
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@tagName(Instruction.add_subtract_immediate),
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), code),
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};
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inst.add_subtract_immediate.imm12 = value;
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@ -16,9 +16,9 @@ pub fn writeAddImmInst(value: u12, code: *[4]u8) void {
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pub fn writeLoadStoreRegInst(value: u12, code: *[4]u8) void {
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var inst: Instruction = .{
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.load_store_register = mem.bytesToValue(std.meta.TagPayload(
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.load_store_register = mem.bytesToValue(@FieldType(
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Instruction,
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Instruction.load_store_register,
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@tagName(Instruction.load_store_register),
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), code),
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};
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inst.load_store_register.offset = value;
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@ -34,9 +34,9 @@ pub fn calcNumberOfPages(saddr: i64, taddr: i64) error{Overflow}!i21 {
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pub fn writeAdrpInst(pages: u21, code: *[4]u8) void {
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var inst = Instruction{
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.pc_relative_address = mem.bytesToValue(std.meta.TagPayload(
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.pc_relative_address = mem.bytesToValue(@FieldType(
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Instruction,
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Instruction.pc_relative_address,
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@tagName(Instruction.pc_relative_address),
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), code),
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};
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inst.pc_relative_address.immhi = @as(u19, @truncate(pages >> 2));
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@ -46,9 +46,9 @@ pub fn writeAdrpInst(pages: u21, code: *[4]u8) void {
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pub fn writeBranchImm(disp: i28, code: *[4]u8) void {
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var inst = Instruction{
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.unconditional_branch_immediate = mem.bytesToValue(std.meta.TagPayload(
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.unconditional_branch_immediate = mem.bytesToValue(@FieldType(
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Instruction,
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Instruction.unconditional_branch_immediate,
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@tagName(Instruction.unconditional_branch_immediate),
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), code),
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};
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inst.unconditional_branch_immediate.imm26 = @as(u26, @truncate(@as(u28, @bitCast(disp >> 2))));
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@ -50,27 +50,27 @@ pub fn writeAddend(
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}
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pub fn writeInstU(code: *[4]u8, value: u32) void {
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var data: Instruction = .{ .U = mem.bytesToValue(std.meta.TagPayload(Instruction, .U), code) };
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var data: Instruction = .{ .U = mem.bytesToValue(@FieldType(Instruction, "U"), code) };
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const compensated: u32 = @bitCast(@as(i32, @bitCast(value)) + 0x800);
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data.U.imm12_31 = bitSlice(compensated, 31, 12);
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mem.writeInt(u32, code, data.toU32(), .little);
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}
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pub fn writeInstI(code: *[4]u8, value: u32) void {
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var data: Instruction = .{ .I = mem.bytesToValue(std.meta.TagPayload(Instruction, .I), code) };
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var data: Instruction = .{ .I = mem.bytesToValue(@FieldType(Instruction, "I"), code) };
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data.I.imm0_11 = bitSlice(value, 11, 0);
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mem.writeInt(u32, code, data.toU32(), .little);
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}
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pub fn writeInstS(code: *[4]u8, value: u32) void {
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var data: Instruction = .{ .S = mem.bytesToValue(std.meta.TagPayload(Instruction, .S), code) };
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var data: Instruction = .{ .S = mem.bytesToValue(@FieldType(Instruction, "S"), code) };
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data.S.imm0_4 = bitSlice(value, 4, 0);
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data.S.imm5_11 = bitSlice(value, 11, 5);
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mem.writeInt(u32, code, data.toU32(), .little);
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}
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pub fn writeInstJ(code: *[4]u8, value: u32) void {
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var data: Instruction = .{ .J = mem.bytesToValue(std.meta.TagPayload(Instruction, .J), code) };
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var data: Instruction = .{ .J = mem.bytesToValue(@FieldType(Instruction, "J"), code) };
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data.J.imm1_10 = bitSlice(value, 10, 1);
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data.J.imm11 = bitSlice(value, 11, 11);
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data.J.imm12_19 = bitSlice(value, 19, 12);
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@ -79,7 +79,7 @@ pub fn writeInstJ(code: *[4]u8, value: u32) void {
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}
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pub fn writeInstB(code: *[4]u8, value: u32) void {
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var data: Instruction = .{ .B = mem.bytesToValue(std.meta.TagPayload(Instruction, .B), code) };
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var data: Instruction = .{ .B = mem.bytesToValue(@FieldType(Instruction, "B"), code) };
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data.B.imm1_4 = bitSlice(value, 4, 1);
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data.B.imm5_10 = bitSlice(value, 10, 5);
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data.B.imm11 = bitSlice(value, 11, 11);
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