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Merge pull request #20894 from alexrp/target-cleanup-4
`std.Target`: Minor rework to some `isArch()` functions, fix some related issues throughout `std`
This commit is contained in:
Andrew Kelley
GitHub
commit
b071b10ce8
12 changed files with 94 additions and 98 deletions
2
lib/compiler/aro/aro/Toolchain.zig
vendored
2
lib/compiler/aro/aro/Toolchain.zig
vendored
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@ -89,7 +89,7 @@ pub fn discover(tc: *Toolchain) !void {
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.{ .unknown = {} } // TODO
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else if (target.cpu.arch.isMIPS())
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.{ .unknown = {} } // TODO
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else if (target.cpu.arch.isPPC())
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else if (target.cpu.arch.isPowerPC())
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.{ .unknown = {} } // TODO
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else if (target.cpu.arch == .ve)
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.{ .unknown = {} } // TODO
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2
lib/compiler/aro/aro/target.zig
vendored
2
lib/compiler/aro/aro/target.zig
vendored
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@ -264,7 +264,7 @@ pub fn systemCompiler(target: std.Target) LangOpts.Compiler {
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pub fn hasFloat128(target: std.Target) bool {
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if (target.cpu.arch.isWasm()) return true;
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if (target.isDarwin()) return false;
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if (target.cpu.arch.isPPC() or target.cpu.arch.isPPC64()) return std.Target.powerpc.featureSetHas(target.cpu.features, .float128);
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if (target.cpu.arch.isPowerPC()) return std.Target.powerpc.featureSetHas(target.cpu.features, .float128);
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return switch (target.os.tag) {
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.dragonfly,
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.haiku,
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@ -22,7 +22,7 @@ pub const want_aeabi = switch (builtin.abi) {
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},
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else => false,
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};
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pub const want_ppc_abi = builtin.cpu.arch.isPPC() or builtin.cpu.arch.isPPC64();
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pub const want_ppc_abi = builtin.cpu.arch.isPowerPC();
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pub const want_float_exceptions = !builtin.cpu.arch.isWasm();
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@ -1084,6 +1084,13 @@ pub const Cpu = struct {
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};
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}
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pub inline fn isLoongArch(arch: Arch) bool {
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return switch (arch) {
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.loongarch32, .loongarch64 => true,
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else => false,
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};
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}
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pub inline fn isRISCV(arch: Arch) bool {
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return switch (arch) {
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.riscv32, .riscv64 => true,
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@ -1092,20 +1099,35 @@ pub const Cpu = struct {
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}
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pub inline fn isMIPS(arch: Arch) bool {
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return arch.isMIPS32() or arch.isMIPS64();
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}
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pub inline fn isMIPS32(arch: Arch) bool {
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return switch (arch) {
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.mips, .mipsel, .mips64, .mips64el => true,
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.mips, .mipsel => true,
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else => false,
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};
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}
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pub inline fn isPPC(arch: Arch) bool {
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pub inline fn isMIPS64(arch: Arch) bool {
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return switch (arch) {
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.mips64, .mips64el => true,
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else => false,
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};
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}
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pub inline fn isPowerPC(arch: Arch) bool {
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return arch.isPowerPC32() or arch.isPowerPC64();
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}
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pub inline fn isPowerPC32(arch: Arch) bool {
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return switch (arch) {
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.powerpc, .powerpcle => true,
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else => false,
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};
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}
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pub inline fn isPPC64(arch: Arch) bool {
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pub inline fn isPowerPC64(arch: Arch) bool {
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return switch (arch) {
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.powerpc64, .powerpc64le => true,
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else => false,
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@ -16,8 +16,7 @@ const native_arch = builtin.cpu.arch;
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const native_abi = builtin.abi;
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const native_endian = native_arch.endian();
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const is_mips = native_arch.isMIPS();
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const is_ppc = native_arch.isPPC();
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const is_ppc64 = native_arch.isPPC64();
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const is_ppc = native_arch.isPowerPC();
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const is_sparc = native_arch.isSPARC();
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const iovec = std.posix.iovec;
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const iovec_const = std.posix.iovec_const;
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@ -434,10 +433,9 @@ fn getauxvalImpl(index: usize) callconv(.C) usize {
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// Some architectures (and some syscalls) require 64bit parameters to be passed
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// in a even-aligned register pair.
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const require_aligned_register_pair =
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builtin.cpu.arch.isPPC() or
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builtin.cpu.arch.isMIPS() or
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builtin.cpu.arch.isARM() or
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builtin.cpu.arch.isThumb();
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builtin.cpu.arch.isPowerPC32() or
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builtin.cpu.arch.isMIPS32() or
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builtin.cpu.arch.isArmOrThumb();
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// Split a 64bit value into a {LSB,MSB} pair.
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// The LE/BE variants specify the endianness to assume.
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@ -2228,7 +2226,7 @@ pub fn process_vm_writev(pid: pid_t, local: []const iovec_const, remote: []const
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}
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pub fn fadvise(fd: fd_t, offset: i64, len: i64, advice: usize) usize {
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if (comptime native_arch.isARM() or native_arch.isPPC()) {
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if (comptime native_arch.isArmOrThumb() or native_arch.isPowerPC32()) {
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// These architectures reorder the arguments so that a register is not skipped to align the
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// register number that `offset` is passed in.
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@ -3575,7 +3573,7 @@ pub const SO = if (is_mips) struct {
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pub const RCVTIMEO_NEW = 66;
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pub const SNDTIMEO_NEW = 67;
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pub const DETACH_REUSEPORT_BPF = 68;
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} else if (is_ppc or is_ppc64) struct {
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} else if (is_ppc) struct {
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pub const DEBUG = 1;
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pub const REUSEADDR = 2;
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pub const TYPE = 3;
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@ -4023,8 +4021,8 @@ pub const T = struct {
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pub const IOCSPGRP = if (is_mips) 0x741d else 0x5410;
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pub const IOCOUTQ = if (is_mips) 0x7472 else 0x5411;
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pub const IOCSTI = if (is_mips) 0x5472 else 0x5412;
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pub const IOCGWINSZ = if (is_mips or is_ppc64) 0x40087468 else 0x5413;
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pub const IOCSWINSZ = if (is_mips or is_ppc64) 0x80087467 else 0x5414;
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pub const IOCGWINSZ = if (is_mips or is_ppc) 0x40087468 else 0x5413;
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pub const IOCSWINSZ = if (is_mips or is_ppc) 0x80087467 else 0x5414;
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pub const IOCMGET = if (is_mips) 0x741d else 0x5415;
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pub const IOCMBIS = if (is_mips) 0x741b else 0x5416;
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pub const IOCMBIC = if (is_mips) 0x741c else 0x5417;
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@ -18,7 +18,7 @@ pub fn suggestVectorLengthForCpu(comptime T: type, comptime cpu: std.Target.Cpu)
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if (std.Target.x86.featureSetHasAny(cpu.features, .{ .prefer_256_bit, .avx2 }) and !std.Target.x86.featureSetHas(cpu.features, .prefer_128_bit)) break :blk 256;
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if (std.Target.x86.featureSetHas(cpu.features, .sse)) break :blk 128;
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if (std.Target.x86.featureSetHasAny(cpu.features, .{ .mmx, .@"3dnow" })) break :blk 64;
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} else if (cpu.arch.isARM()) {
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} else if (cpu.arch.isArmOrThumb()) {
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if (std.Target.arm.featureSetHas(cpu.features, .neon)) break :blk 128;
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} else if (cpu.arch.isAARCH64()) {
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// SVE allows up to 2048 bits in the specification, as of 2022 the most powerful machine has implemented 512-bit
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@ -26,7 +26,7 @@ pub fn suggestVectorLengthForCpu(comptime T: type, comptime cpu: std.Target.Cpu)
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// TODO: Check on this return when bigger values are more common
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if (std.Target.aarch64.featureSetHas(cpu.features, .sve)) break :blk 128;
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if (std.Target.aarch64.featureSetHas(cpu.features, .neon)) break :blk 128;
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} else if (cpu.arch.isPPC() or cpu.arch.isPPC64()) {
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} else if (cpu.arch.isPowerPC()) {
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if (std.Target.powerpc.featureSetHas(cpu.features, .altivec)) break :blk 128;
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} else if (cpu.arch.isMIPS()) {
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if (std.Target.mips.featureSetHas(cpu.features, .msa)) break :blk 128;
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@ -495,7 +495,7 @@ fn posixCallMainAndExit(argc_argv_ptr: [*]usize) callconv(.C) noreturn {
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// ARMv6 targets (and earlier) have no support for TLS in hardware.
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// FIXME: Elide the check for targets >= ARMv7 when the target feature API
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// becomes less verbose (and more usable).
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if (comptime native_arch.isARM()) {
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if (comptime native_arch.isArmOrThumb()) {
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if (at_hwcap & std.os.linux.HWCAP.TLS == 0) {
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// FIXME: Make __aeabi_read_tp call the kernel helper kuser_get_tls
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// For the time being use a simple trap instead of a @panic call to
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@ -399,7 +399,7 @@ const DataLayoutBuilder = struct {
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else if (self.target.cpu.arch == .powerpc64 and
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self.target.os.tag != .freebsd and self.target.abi != .musl)
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try writer.writeAll("-Fi64")
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else if (self.target.cpu.arch.isPPC() or self.target.cpu.arch.isPPC64())
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else if (self.target.cpu.arch.isPowerPC())
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try writer.writeAll("-Fn32");
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if (self.target.cpu.arch != .hexagon) {
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if (self.target.cpu.arch == .arc or self.target.cpu.arch == .s390x)
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@ -659,7 +659,7 @@ const DataLayoutBuilder = struct {
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128 => abi = 64,
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else => {},
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}
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} else if ((self.target.cpu.arch.isPPC64() and self.target.os.tag == .linux and
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} else if ((self.target.cpu.arch.isPowerPC64() and self.target.os.tag == .linux and
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(size == 256 or size == 512)) or
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(self.target.cpu.arch.isNvptx() and (size == 16 or size == 32)))
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{
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@ -392,9 +392,9 @@ pub fn buildCRTFile(comp: *Compilation, crt_file: CRTFile, prog_node: std.Progre
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fn start_asm_path(comp: *Compilation, arena: Allocator, basename: []const u8) ![]const u8 {
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const arch = comp.getTarget().cpu.arch;
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const is_ppc = arch == .powerpc or arch == .powerpc64 or arch == .powerpc64le;
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const is_aarch64 = arch == .aarch64 or arch == .aarch64_be;
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const is_sparc = arch == .sparc or arch == .sparc64;
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const is_ppc = arch.isPowerPC();
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const is_aarch64 = arch.isAARCH64();
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const is_sparc = arch.isSPARC();
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const is_64 = comp.getTarget().ptrBitWidth() == 64;
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const s = path.sep_str;
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@ -412,7 +412,7 @@ fn start_asm_path(comp: *Compilation, arena: Allocator, basename: []const u8) ![
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try result.appendSlice("sparc" ++ s ++ "sparc32");
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}
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}
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} else if (arch.isARM()) {
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} else if (arch.isArmOrThumb()) {
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try result.appendSlice("arm");
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} else if (arch.isMIPS()) {
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if (!mem.eql(u8, basename, "crti.S") and !mem.eql(u8, basename, "crtn.S")) {
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@ -529,10 +529,10 @@ fn add_include_dirs_arch(
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dir: []const u8,
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) error{OutOfMemory}!void {
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const arch = target.cpu.arch;
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const is_x86 = arch == .x86 or arch == .x86_64;
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const is_aarch64 = arch == .aarch64 or arch == .aarch64_be;
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const is_ppc = arch == .powerpc or arch == .powerpc64 or arch == .powerpc64le;
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const is_sparc = arch == .sparc or arch == .sparc64;
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const is_x86 = arch.isX86();
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const is_aarch64 = arch.isAARCH64();
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const is_ppc = arch.isPowerPC();
|
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const is_sparc = arch.isSPARC();
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const is_64 = target.ptrBitWidth() == 64;
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const s = path.sep_str;
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@ -562,7 +562,7 @@ fn add_include_dirs_arch(
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try args.append("-I");
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try args.append(try path.join(arena, &[_][]const u8{ dir, "x86" }));
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}
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} else if (arch.isARM()) {
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} else if (arch.isArmOrThumb()) {
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if (opt_nptl) |nptl| {
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try args.append("-I");
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try args.append(try path.join(arena, &[_][]const u8{ dir, "arm", nptl }));
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|
|
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|
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@ -131,7 +131,7 @@ pub fn buildStaticLib(comp: *Compilation, prog_node: std.Progress.Node) BuildErr
|
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if (!comp.config.any_non_single_threaded) {
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try cflags.append("-D_LIBUNWIND_HAS_NO_THREADS");
|
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}
|
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if (target.cpu.arch.isARM() and target.abi.floatAbi() == .hard) {
|
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if (target.cpu.arch.isArmOrThumb() and target.abi.floatAbi() == .hard) {
|
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try cflags.append("-DCOMPILER_RT_ARMHF_TARGET");
|
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}
|
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try cflags.append("-Wno-bitwise-conditional-parentheses");
|
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|
|
|
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|
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@ -1903,7 +1903,7 @@ test "reinterpret packed union" {
|
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try comptime S.doTheTest();
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|
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if (builtin.zig_backend == .stage2_c) return error.SkipZigTest; // TODO
|
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if (builtin.cpu.arch.isPPC()) return error.SkipZigTest; // TODO
|
||||
if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest; // TODO
|
||||
if (builtin.cpu.arch.isWasm()) return error.SkipZigTest; // TODO
|
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try S.doTheTest();
|
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}
|
||||
|
|
|
|||
|
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@ -11,7 +11,7 @@ const print = std.debug.print;
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const expect = std.testing.expect;
|
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const expectEqual = std.testing.expectEqual;
|
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const have_i128 = builtin.cpu.arch != .x86 and !builtin.cpu.arch.isARM() and
|
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!builtin.cpu.arch.isMIPS() and !builtin.cpu.arch.isPPC();
|
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!builtin.cpu.arch.isMIPS() and !builtin.cpu.arch.isPowerPC32();
|
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|
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const have_f128 = builtin.cpu.arch.isX86() and !builtin.os.tag.isDarwin();
|
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const have_f80 = builtin.cpu.arch.isX86();
|
||||
|
|
@ -123,8 +123,7 @@ test "C ABI floats" {
|
|||
}
|
||||
|
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test "C ABI long double" {
|
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if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPPC64()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
|
||||
|
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c_long_double(12.34);
|
||||
}
|
||||
|
|
@ -182,7 +181,7 @@ extern fn c_cmultf(a: ComplexFloat, b: ComplexFloat) ComplexFloat;
|
|||
extern fn c_cmultd(a: ComplexDouble, b: ComplexDouble) ComplexDouble;
|
||||
|
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const complex_abi_compatible = builtin.cpu.arch != .x86 and !builtin.cpu.arch.isMIPS() and
|
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!builtin.cpu.arch.isARM() and !builtin.cpu.arch.isPPC() and !builtin.cpu.arch.isRISCV();
|
||||
!builtin.cpu.arch.isARM() and !builtin.cpu.arch.isPowerPC32() and !builtin.cpu.arch.isRISCV();
|
||||
|
||||
test "C ABI complex float" {
|
||||
if (!complex_abi_compatible) return error.SkipZigTest;
|
||||
|
|
@ -324,7 +323,7 @@ extern fn c_struct_u64_u64_8(usize, usize, usize, usize, usize, usize, usize, us
|
|||
|
||||
test "C ABI struct u64 u64" {
|
||||
if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
|
||||
|
||||
const s = c_ret_struct_u64_u64();
|
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try expect(s.a == 21);
|
||||
|
|
@ -361,7 +360,7 @@ extern fn c_struct_f32f32_f32(Struct_f32f32_f32) void;
|
|||
|
||||
test "C ABI struct {f32,f32} f32" {
|
||||
if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
|
||||
|
||||
const s = c_ret_struct_f32f32_f32();
|
||||
try expect(s.a.b == 1.0);
|
||||
|
|
@ -391,7 +390,7 @@ extern fn c_struct_f32_f32f32(Struct_f32_f32f32) void;
|
|||
|
||||
test "C ABI struct f32 {f32,f32}" {
|
||||
if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
|
||||
|
||||
const s = c_ret_struct_f32_f32f32();
|
||||
try expect(s.a == 1.0);
|
||||
|
|
@ -426,8 +425,7 @@ extern fn c_struct_u32_union_u32_u32u32(Struct_u32_Union_u32_u32u32) void;
|
|||
|
||||
test "C ABI struct{u32,union{u32,struct{u32,u32}}}" {
|
||||
if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPPC64()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
|
||||
|
||||
const s = c_ret_struct_u32_union_u32_u32u32();
|
||||
try expect(s.a == 1);
|
||||
|
|
@ -447,7 +445,7 @@ extern fn c_big_struct(BigStruct) void;
|
|||
|
||||
test "C ABI big struct" {
|
||||
if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
|
||||
|
||||
const s = BigStruct{
|
||||
.a = 1,
|
||||
|
|
@ -473,7 +471,7 @@ const BigUnion = extern union {
|
|||
extern fn c_big_union(BigUnion) void;
|
||||
|
||||
test "C ABI big union" {
|
||||
if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
|
||||
|
||||
const x = BigUnion{
|
||||
.a = BigStruct{
|
||||
|
|
@ -506,8 +504,7 @@ extern fn c_ret_med_struct_mixed() MedStructMixed;
|
|||
|
||||
test "C ABI medium struct of ints and floats" {
|
||||
if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPPC64()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
|
||||
|
||||
const s = MedStructMixed{
|
||||
.a = 1234,
|
||||
|
|
@ -539,8 +536,7 @@ extern fn c_ret_small_struct_ints() SmallStructInts;
|
|||
test "C ABI small struct of ints" {
|
||||
if (builtin.cpu.arch == .x86) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPPC64()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
|
||||
|
||||
const s = SmallStructInts{
|
||||
.a = 1,
|
||||
|
|
@ -573,8 +569,7 @@ extern fn c_ret_med_struct_ints() MedStructInts;
|
|||
|
||||
test "C ABI medium struct of ints" {
|
||||
if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPPC64()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
|
||||
|
||||
const s = MedStructInts{
|
||||
.x = 1,
|
||||
|
|
@ -652,8 +647,7 @@ extern fn c_split_struct_ints(SplitStructInt) void;
|
|||
test "C ABI split struct of ints" {
|
||||
if (builtin.cpu.arch == .x86) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPPC64()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
|
||||
|
||||
const s = SplitStructInt{
|
||||
.a = 1234,
|
||||
|
|
@ -680,8 +674,7 @@ extern fn c_ret_split_struct_mixed() SplitStructMixed;
|
|||
test "C ABI split struct of ints and floats" {
|
||||
if (builtin.cpu.arch == .x86) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPPC64()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
|
||||
|
||||
const s = SplitStructMixed{
|
||||
.a = 1234,
|
||||
|
|
@ -708,7 +701,7 @@ extern fn c_multiple_struct_floats(FloatRect, FloatRect) void;
|
|||
|
||||
test "C ABI sret and byval together" {
|
||||
if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
|
||||
|
||||
const s = BigStruct{
|
||||
.a = 1,
|
||||
|
|
@ -760,8 +753,7 @@ extern fn c_big_struct_floats(Vector5) void;
|
|||
|
||||
test "C ABI structs of floats as parameter" {
|
||||
if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPPC64()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
|
||||
|
||||
const v3 = Vector3{
|
||||
.x = 3.0,
|
||||
|
|
@ -800,8 +792,7 @@ export fn zig_multiple_struct_ints(x: Rect, y: Rect) void {
|
|||
}
|
||||
|
||||
test "C ABI structs of ints as multiple parameters" {
|
||||
if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPPC64()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
|
||||
|
||||
const r1 = Rect{
|
||||
.left = 1,
|
||||
|
|
@ -838,7 +829,7 @@ export fn zig_multiple_struct_floats(x: FloatRect, y: FloatRect) void {
|
|||
|
||||
test "C ABI structs of floats as multiple parameters" {
|
||||
if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
|
||||
|
||||
const r1 = FloatRect{
|
||||
.left = 1,
|
||||
|
|
@ -951,8 +942,7 @@ extern fn c_ret_struct_with_array() StructWithArray;
|
|||
test "Struct with array as padding." {
|
||||
if (builtin.cpu.arch == .x86) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPPC64()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
|
||||
|
||||
c_struct_with_array(.{ .a = 1, .padding = undefined, .b = 2 });
|
||||
|
||||
|
|
@ -977,7 +967,7 @@ extern fn c_ret_float_array_struct() FloatArrayStruct;
|
|||
|
||||
test "Float array like struct" {
|
||||
if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
|
||||
|
||||
c_float_array_struct(.{
|
||||
.origin = .{
|
||||
|
|
@ -1004,7 +994,7 @@ extern fn c_ret_small_vec() SmallVec;
|
|||
|
||||
test "small simd vector" {
|
||||
if (builtin.cpu.arch == .x86) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPPC64()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
|
||||
|
||||
c_small_vec(.{ 1, 2 });
|
||||
|
||||
|
|
@ -1022,7 +1012,7 @@ test "medium simd vector" {
|
|||
if (builtin.zig_backend == .stage2_x86_64 and
|
||||
!comptime std.Target.x86.featureSetHas(builtin.cpu.features, .avx)) return error.SkipZigTest;
|
||||
|
||||
if (builtin.cpu.arch.isPPC64()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
|
||||
|
||||
c_medium_vec(.{ 1, 2, 3, 4 });
|
||||
|
||||
|
|
@ -1042,7 +1032,7 @@ test "big simd vector" {
|
|||
if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
|
||||
|
||||
if (builtin.cpu.arch.isMIPS() and builtin.mode != .Debug) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPPC64()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPowerPC64()) return error.SkipZigTest;
|
||||
if (builtin.zig_backend == .stage2_llvm and builtin.cpu.arch == .x86_64 and builtin.os.tag == .macos and builtin.mode != .Debug) return error.SkipZigTest;
|
||||
|
||||
c_big_vec(.{ 1, 2, 3, 4, 5, 6, 7, 8 });
|
||||
|
|
@ -5352,7 +5342,7 @@ extern fn c_ret_ptr_size_float_struct() Vector2;
|
|||
test "C ABI pointer sized float struct" {
|
||||
if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isRISCV()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
|
||||
|
||||
c_ptr_size_float_struct(.{ .x = 1, .y = 2 });
|
||||
|
||||
|
|
@ -5374,29 +5364,25 @@ const DC = extern struct { v1: f64, v2: u8 };
|
|||
test "DC: Zig passes to C" {
|
||||
if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isRISCV()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPPC64()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
|
||||
try expectOk(c_assert_DC(.{ .v1 = -0.25, .v2 = 15 }));
|
||||
}
|
||||
test "DC: Zig returns to C" {
|
||||
if (builtin.cpu.arch.isMIPS() and builtin.mode != .Debug) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isRISCV()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPPC64()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
|
||||
try expectOk(c_assert_ret_DC());
|
||||
}
|
||||
test "DC: C passes to Zig" {
|
||||
if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isRISCV()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPPC64()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
|
||||
try expectOk(c_send_DC());
|
||||
}
|
||||
test "DC: C returns to Zig" {
|
||||
if (builtin.cpu.arch.isMIPS() and builtin.mode != .Debug) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isRISCV()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPPC64()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
|
||||
try expectEqual(DC{ .v1 = -0.25, .v2 = 15 }, c_ret_DC());
|
||||
}
|
||||
|
||||
|
|
@ -5421,14 +5407,12 @@ const CFF = extern struct { v1: u8, v2: f32, v3: f32 };
|
|||
test "CFF: Zig passes to C" {
|
||||
if (builtin.target.cpu.arch == .x86) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPPC64()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
|
||||
try expectOk(c_assert_CFF(.{ .v1 = 39, .v2 = 0.875, .v3 = 1.0 }));
|
||||
}
|
||||
test "CFF: Zig returns to C" {
|
||||
if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPPC64()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
|
||||
try expectOk(c_assert_ret_CFF());
|
||||
}
|
||||
test "CFF: C passes to Zig" {
|
||||
|
|
@ -5436,8 +5420,7 @@ test "CFF: C passes to Zig" {
|
|||
if (builtin.cpu.arch.isRISCV() and builtin.mode != .Debug) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch == .aarch64 and builtin.mode != .Debug) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPPC64()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
|
||||
|
||||
try expectOk(c_send_CFF());
|
||||
}
|
||||
|
|
@ -5445,8 +5428,7 @@ test "CFF: C returns to Zig" {
|
|||
if (builtin.cpu.arch == .aarch64 and builtin.mode != .Debug) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isRISCV() and builtin.mode != .Debug) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPPC64()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
|
||||
try expectEqual(CFF{ .v1 = 39, .v2 = 0.875, .v3 = 1.0 }, c_ret_CFF());
|
||||
}
|
||||
pub extern fn c_assert_CFF(lv: CFF) c_int;
|
||||
|
|
@ -5470,26 +5452,22 @@ const PD = extern struct { v1: ?*anyopaque, v2: f64 };
|
|||
|
||||
test "PD: Zig passes to C" {
|
||||
if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPPC64()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
|
||||
try expectOk(c_assert_PD(.{ .v1 = null, .v2 = 0.5 }));
|
||||
}
|
||||
test "PD: Zig returns to C" {
|
||||
if (builtin.cpu.arch.isMIPS() and builtin.mode != .Debug) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPPC64()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
|
||||
try expectOk(c_assert_ret_PD());
|
||||
}
|
||||
test "PD: C passes to Zig" {
|
||||
if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPPC64()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
|
||||
try expectOk(c_send_PD());
|
||||
}
|
||||
test "PD: C returns to Zig" {
|
||||
if (builtin.cpu.arch.isMIPS() and builtin.mode != .Debug) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPPC64()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
|
||||
try expectEqual(PD{ .v1 = null, .v2 = 0.5 }, c_ret_PD());
|
||||
}
|
||||
pub extern fn c_assert_PD(lv: PD) c_int;
|
||||
|
|
@ -5521,7 +5499,7 @@ const ByRef = extern struct {
|
|||
extern fn c_modify_by_ref_param(ByRef) ByRef;
|
||||
|
||||
test "C function modifies by ref param" {
|
||||
if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
|
||||
|
||||
const res = c_modify_by_ref_param(.{ .val = 1, .arr = undefined });
|
||||
try expect(res.val == 42);
|
||||
|
|
@ -5543,7 +5521,7 @@ const ByVal = extern struct {
|
|||
extern fn c_func_ptr_byval(*anyopaque, *anyopaque, ByVal, c_ulong, *anyopaque, c_ulong) void;
|
||||
test "C function that takes byval struct called via function pointer" {
|
||||
if (builtin.cpu.arch.isMIPS() and builtin.mode != .Debug) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
|
||||
|
||||
var fn_ptr = &c_func_ptr_byval;
|
||||
_ = &fn_ptr;
|
||||
|
|
@ -5574,8 +5552,7 @@ const f16_struct = extern struct {
|
|||
extern fn c_f16_struct(f16_struct) f16_struct;
|
||||
test "f16 struct" {
|
||||
if (builtin.target.cpu.arch.isMIPS()) return error.SkipZigTest;
|
||||
if (builtin.target.cpu.arch.isPPC()) return error.SkipZigTest;
|
||||
if (builtin.target.cpu.arch.isPPC()) return error.SkipZigTest;
|
||||
if (builtin.target.cpu.arch.isPowerPC32()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isARM() and builtin.mode != .Debug) return error.SkipZigTest;
|
||||
|
||||
const a = c_f16_struct(.{ .a = 12 });
|
||||
|
|
@ -5690,8 +5667,7 @@ const Coord2 = extern struct {
|
|||
extern fn stdcall_coord2(Coord2, Coord2, Coord2) callconv(stdcall_callconv) Coord2;
|
||||
test "Stdcall ABI structs" {
|
||||
if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPPC64()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPowerPC()) return error.SkipZigTest;
|
||||
|
||||
const res = stdcall_coord2(
|
||||
.{ .x = 0x1111, .y = 0x2222 },
|
||||
|
|
@ -5704,7 +5680,7 @@ test "Stdcall ABI structs" {
|
|||
|
||||
extern fn stdcall_big_union(BigUnion) callconv(stdcall_callconv) void;
|
||||
test "Stdcall ABI big union" {
|
||||
if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
|
||||
|
||||
const x = BigUnion{
|
||||
.a = BigStruct{
|
||||
|
|
@ -5776,7 +5752,7 @@ const byval_tail_callsite_attr = struct {
|
|||
|
||||
test "byval tail callsite attribute" {
|
||||
if (builtin.cpu.arch.isMIPS()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPPC()) return error.SkipZigTest;
|
||||
if (builtin.cpu.arch.isPowerPC32()) return error.SkipZigTest;
|
||||
|
||||
// Originally reported at https://github.com/ziglang/zig/issues/16290
|
||||
// the bug was that the extern function had the byval attribute, but
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue