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https://codeberg.org/ziglang/zig.git
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Merge pull request #25917 from alexrp/target-features
`std.Target`: add CPU features and models for alpha and hppa
This commit is contained in:
Alex Rønne Petersen
GitHub
commit
b38fb4bff3
5 changed files with 516 additions and 9 deletions
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@ -704,7 +704,7 @@ pub const Os = struct {
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};
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pub const aarch64 = @import("Target/aarch64.zig");
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pub const alpha = @import("Target/generic.zig");
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pub const alpha = @import("Target/alpha.zig");
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pub const amdgcn = @import("Target/amdgcn.zig");
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pub const arc = @import("Target/arc.zig");
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pub const arm = @import("Target/arm.zig");
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@ -712,7 +712,7 @@ pub const avr = @import("Target/avr.zig");
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pub const bpf = @import("Target/bpf.zig");
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pub const csky = @import("Target/csky.zig");
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pub const hexagon = @import("Target/hexagon.zig");
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pub const hppa = @import("Target/generic.zig");
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pub const hppa = @import("Target/hppa.zig");
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pub const kalimba = @import("Target/generic.zig");
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pub const kvx = @import("Target/kvx.zig");
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pub const lanai = @import("Target/lanai.zig");
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@ -1950,8 +1950,11 @@ pub const Cpu = struct {
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/// Clang compatibility is important, consider using `baseline` instead.
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pub fn generic(arch: Arch) *const Model {
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return switch (arch) {
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.alpha => &alpha.cpu.ev4,
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.amdgcn => &amdgcn.cpu.gfx600,
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.avr => &avr.cpu.avr1,
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.hppa => &hppa.cpu.ts_1,
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.hppa64 => &hppa.cpu.pa_8000,
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.kvx => &kvx.cpu.coolidge_v1,
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.loongarch32 => &loongarch.cpu.generic_la32,
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.loongarch64 => &loongarch.cpu.generic_la64,
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@ -1982,6 +1985,7 @@ pub const Cpu = struct {
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/// `Os.Tag.freestanding`.
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pub fn baseline(arch: Arch, os: Os) *const Model {
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return switch (arch) {
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.alpha => &alpha.cpu.ev6,
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.amdgcn => &amdgcn.cpu.gfx906,
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.arm => switch (os.tag) {
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.@"3ds" => &arm.cpu.mpcore,
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@ -2004,6 +2008,7 @@ pub const Cpu = struct {
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.bpfel, .bpfeb => &bpf.cpu.v3,
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.csky => &csky.cpu.ck810, // gcc/clang do not have a generic csky model.
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.hexagon => &hexagon.cpu.hexagonv68, // gcc/clang do not have a generic hexagon model.
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.hppa => &hppa.cpu.pa_7300lc,
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.kvx => &kvx.cpu.coolidge_v2,
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.lanai => &lanai.cpu.v11, // clang does not have a generic lanai model.
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.loongarch64 => &loongarch.cpu.la64v1_0,
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101
lib/std/Target/alpha.zig
Normal file
101
lib/std/Target/alpha.zig
Normal file
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@ -0,0 +1,101 @@
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//! This file is auto-generated by tools/update_cpu_features.zig.
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const std = @import("../std.zig");
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const CpuFeature = std.Target.Cpu.Feature;
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const CpuModel = std.Target.Cpu.Model;
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pub const Feature = enum {
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bwx,
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cix,
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fix,
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max,
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};
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pub const featureSet = CpuFeature.FeatureSetFns(Feature).featureSet;
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pub const featureSetHas = CpuFeature.FeatureSetFns(Feature).featureSetHas;
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pub const featureSetHasAny = CpuFeature.FeatureSetFns(Feature).featureSetHasAny;
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pub const featureSetHasAll = CpuFeature.FeatureSetFns(Feature).featureSetHasAll;
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pub const all_features = blk: {
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const len = @typeInfo(Feature).@"enum".fields.len;
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std.debug.assert(len <= CpuFeature.Set.needed_bit_count);
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var result: [len]CpuFeature = undefined;
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result[@intFromEnum(Feature.bwx)] = .{
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.llvm_name = null,
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.description = "Enable byte/word extensions",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@intFromEnum(Feature.cix)] = .{
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.llvm_name = null,
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.description = "Enable counting extensions",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@intFromEnum(Feature.fix)] = .{
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.llvm_name = null,
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.description = "Enable floating point move and square root extensions",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@intFromEnum(Feature.max)] = .{
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.llvm_name = null,
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.description = "Enable motion video extensions",
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.dependencies = featureSet(&[_]Feature{}),
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};
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const ti = @typeInfo(Feature);
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for (&result, 0..) |*elem, i| {
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elem.index = i;
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elem.name = ti.@"enum".fields[i].name;
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}
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break :blk result;
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};
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pub const cpu = struct {
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pub const ev4: CpuModel = .{
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.name = "ev4",
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.llvm_name = null,
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.features = featureSet(&[_]Feature{}),
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};
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pub const ev45: CpuModel = .{
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.name = "ev45",
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.llvm_name = null,
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.features = featureSet(&[_]Feature{}),
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};
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pub const ev5: CpuModel = .{
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.name = "ev5",
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.llvm_name = null,
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.features = featureSet(&[_]Feature{}),
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};
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pub const ev56: CpuModel = .{
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.name = "ev56",
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.llvm_name = null,
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.features = featureSet(&[_]Feature{
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.bwx,
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}),
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};
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pub const ev6: CpuModel = .{
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.name = "ev6",
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.llvm_name = null,
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.features = featureSet(&[_]Feature{
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.bwx,
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.fix,
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.max,
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}),
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};
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pub const ev67: CpuModel = .{
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.name = "ev67",
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.llvm_name = null,
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.features = featureSet(&[_]Feature{
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.bwx,
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.cix,
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.fix,
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.max,
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}),
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};
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pub const pca56: CpuModel = .{
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.name = "pca56",
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.llvm_name = null,
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.features = featureSet(&[_]Feature{
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.bwx,
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.max,
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}),
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};
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};
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178
lib/std/Target/hppa.zig
Normal file
178
lib/std/Target/hppa.zig
Normal file
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@ -0,0 +1,178 @@
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//! This file is auto-generated by tools/update_cpu_features.zig.
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const std = @import("../std.zig");
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const CpuFeature = std.Target.Cpu.Feature;
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const CpuModel = std.Target.Cpu.Model;
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pub const Feature = enum {
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@"64bit",
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max_1,
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max_2,
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v1_1,
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v2_0,
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};
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pub const featureSet = CpuFeature.FeatureSetFns(Feature).featureSet;
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pub const featureSetHas = CpuFeature.FeatureSetFns(Feature).featureSetHas;
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pub const featureSetHasAny = CpuFeature.FeatureSetFns(Feature).featureSetHasAny;
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pub const featureSetHasAll = CpuFeature.FeatureSetFns(Feature).featureSetHasAll;
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pub const all_features = blk: {
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const len = @typeInfo(Feature).@"enum".fields.len;
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std.debug.assert(len <= CpuFeature.Set.needed_bit_count);
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var result: [len]CpuFeature = undefined;
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result[@intFromEnum(Feature.@"64bit")] = .{
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.llvm_name = null,
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.description = "Enable 64-bit PA-RISC 2.0",
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.dependencies = featureSet(&[_]Feature{
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.v2_0,
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}),
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};
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result[@intFromEnum(Feature.max_1)] = .{
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.llvm_name = null,
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.description = "Enable MAX-1 multimedia acceleration extensions",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@intFromEnum(Feature.max_2)] = .{
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.llvm_name = null,
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.description = "Enable MAX-2 multimedia acceleration extensions",
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.dependencies = featureSet(&[_]Feature{
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.max_1,
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}),
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};
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result[@intFromEnum(Feature.v1_1)] = .{
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.llvm_name = null,
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.description = "Enable ISA v1.1",
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.dependencies = featureSet(&[_]Feature{}),
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};
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result[@intFromEnum(Feature.v2_0)] = .{
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.llvm_name = null,
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.description = "Enable ISA v2.0",
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.dependencies = featureSet(&[_]Feature{
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.max_2,
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.v1_1,
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}),
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};
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const ti = @typeInfo(Feature);
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for (&result, 0..) |*elem, i| {
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elem.index = i;
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elem.name = ti.@"enum".fields[i].name;
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}
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break :blk result;
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};
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pub const cpu = struct {
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pub const ns_1: CpuModel = .{
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.name = "ns_1",
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.llvm_name = null,
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.features = featureSet(&[_]Feature{}),
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};
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pub const ns_2: CpuModel = .{
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.name = "ns_2",
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.llvm_name = null,
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.features = featureSet(&[_]Feature{}),
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};
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pub const pa_7000: CpuModel = .{
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.name = "pa_7000",
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.llvm_name = null,
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.features = featureSet(&[_]Feature{
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.v1_1,
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}),
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};
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pub const pa_7100: CpuModel = .{
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.name = "pa_7100",
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.llvm_name = null,
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.features = featureSet(&[_]Feature{
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.v1_1,
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}),
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};
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pub const pa_7100lc: CpuModel = .{
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.name = "pa_7100lc",
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.llvm_name = null,
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.features = featureSet(&[_]Feature{
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.max_1,
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.v1_1,
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}),
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};
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pub const pa_7150: CpuModel = .{
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.name = "pa_7150",
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.llvm_name = null,
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.features = featureSet(&[_]Feature{
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.v1_1,
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}),
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};
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pub const pa_7200: CpuModel = .{
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.name = "pa_7200",
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.llvm_name = null,
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.features = featureSet(&[_]Feature{
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.v1_1,
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}),
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};
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pub const pa_7300lc: CpuModel = .{
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.name = "pa_7300lc",
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.llvm_name = null,
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.features = featureSet(&[_]Feature{
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.max_1,
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.v1_1,
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}),
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};
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pub const pa_8000: CpuModel = .{
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.name = "pa_8000",
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.llvm_name = null,
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.features = featureSet(&[_]Feature{
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.@"64bit",
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}),
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};
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pub const pa_8200: CpuModel = .{
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.name = "pa_8200",
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.llvm_name = null,
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.features = featureSet(&[_]Feature{
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.@"64bit",
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}),
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};
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pub const pa_8500: CpuModel = .{
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.name = "pa_8500",
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.llvm_name = null,
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.features = featureSet(&[_]Feature{
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.@"64bit",
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}),
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};
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pub const pa_8600: CpuModel = .{
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.name = "pa_8600",
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.llvm_name = null,
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.features = featureSet(&[_]Feature{
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.@"64bit",
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}),
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};
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pub const pa_8700: CpuModel = .{
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.name = "pa_8700",
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.llvm_name = null,
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.features = featureSet(&[_]Feature{
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.@"64bit",
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}),
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};
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pub const pa_8800: CpuModel = .{
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.name = "pa_8800",
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.llvm_name = null,
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.features = featureSet(&[_]Feature{
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.@"64bit",
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}),
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};
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pub const pa_8900: CpuModel = .{
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.name = "pa_8900",
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.llvm_name = null,
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.features = featureSet(&[_]Feature{
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.@"64bit",
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}),
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};
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pub const pcx: CpuModel = .{
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.name = "pcx",
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.llvm_name = null,
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.features = featureSet(&[_]Feature{}),
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};
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pub const ts_1: CpuModel = .{
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.name = "ts_1",
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.llvm_name = null,
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.features = featureSet(&[_]Feature{}),
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};
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};
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@ -3081,13 +3081,6 @@ pub const cpu = struct {
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.xsaveopt,
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}),
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};
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pub const @"i86": CpuModel = .{
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.name = "i86",
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.llvm_name = null,
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.features = featureSet(&[_]Feature{
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.@"16bit_mode",
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}),
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};
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pub const @"i386": CpuModel = .{
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.name = "i386",
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.llvm_name = "i386",
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@ -3129,6 +3122,13 @@ pub const cpu = struct {
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.x87,
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}),
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};
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pub const @"i86": CpuModel = .{
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.name = "i86",
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.llvm_name = null,
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.features = featureSet(&[_]Feature{
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.@"16bit_mode",
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}),
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};
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pub const icelake_client: CpuModel = .{
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.name = "icelake_client",
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.llvm_name = "icelake-client",
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|
|
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@ -393,6 +393,83 @@ const targets = [_]ArchTarget{
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"apple-latest",
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},
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},
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.{
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.zig_name = "alpha",
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.llvm = null,
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.extra_features = &.{
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.{
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.zig_name = "bwx",
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.desc = "Enable byte/word extensions",
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.deps = &.{},
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},
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.{
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.zig_name = "cix",
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.desc = "Enable counting extensions",
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.deps = &.{},
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},
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.{
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.zig_name = "fix",
|
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.desc = "Enable floating point move and square root extensions",
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.deps = &.{},
|
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},
|
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.{
|
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.zig_name = "max",
|
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.desc = "Enable motion video extensions",
|
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.deps = &.{},
|
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},
|
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},
|
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.extra_cpus = &.{
|
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.{
|
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.llvm_name = null,
|
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.zig_name = "ev4",
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.features = &.{},
|
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},
|
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.{
|
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.llvm_name = null,
|
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.zig_name = "ev45",
|
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.features = &.{},
|
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},
|
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.{
|
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.llvm_name = null,
|
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.zig_name = "ev5",
|
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.features = &.{},
|
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},
|
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.{
|
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.llvm_name = null,
|
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.zig_name = "ev56",
|
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.features = &.{
|
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"bwx",
|
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},
|
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},
|
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.{
|
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.llvm_name = null,
|
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.zig_name = "pca56",
|
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.features = &.{
|
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"bwx",
|
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"max",
|
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},
|
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},
|
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.{
|
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.llvm_name = null,
|
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.zig_name = "ev6",
|
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.features = &.{
|
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"bwx",
|
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"fix",
|
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"max",
|
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},
|
||||
},
|
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.{
|
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.llvm_name = null,
|
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.zig_name = "ev67",
|
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.features = &.{
|
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"bwx",
|
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"cix",
|
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"fix",
|
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"max",
|
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},
|
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},
|
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},
|
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},
|
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.{
|
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.zig_name = "amdgcn",
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.llvm = .{
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|
|
@ -973,6 +1050,152 @@ const targets = [_]ArchTarget{
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.td_name = "Hexagon",
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},
|
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},
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.{
|
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.zig_name = "hppa",
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.llvm = null,
|
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.extra_features = &.{
|
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.{
|
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.zig_name = "64bit",
|
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.desc = "Enable 64-bit PA-RISC 2.0",
|
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.deps = &.{"v2_0"},
|
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},
|
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.{
|
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.zig_name = "max_1",
|
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.desc = "Enable MAX-1 multimedia acceleration extensions",
|
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.deps = &.{},
|
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},
|
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.{
|
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.zig_name = "max_2",
|
||||
.desc = "Enable MAX-2 multimedia acceleration extensions",
|
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.deps = &.{"max_1"},
|
||||
},
|
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.{
|
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.zig_name = "v1_1",
|
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.desc = "Enable ISA v1.1",
|
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.deps = &.{},
|
||||
},
|
||||
.{
|
||||
.zig_name = "v2_0",
|
||||
.desc = "Enable ISA v2.0",
|
||||
.deps = &.{ "max_2", "v1_1" },
|
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},
|
||||
},
|
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.extra_cpus = &.{
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.{
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.llvm_name = null,
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||||
.zig_name = "ts_1",
|
||||
.features = &.{},
|
||||
},
|
||||
.{
|
||||
.llvm_name = null,
|
||||
.zig_name = "ns_1",
|
||||
.features = &.{},
|
||||
},
|
||||
.{
|
||||
.llvm_name = null,
|
||||
.zig_name = "ns_2",
|
||||
.features = &.{},
|
||||
},
|
||||
.{
|
||||
.llvm_name = null,
|
||||
.zig_name = "pcx",
|
||||
.features = &.{},
|
||||
},
|
||||
.{
|
||||
.llvm_name = null,
|
||||
.zig_name = "pa_7000",
|
||||
.features = &.{
|
||||
"v1_1",
|
||||
},
|
||||
},
|
||||
.{
|
||||
.llvm_name = null,
|
||||
.zig_name = "pa_7100",
|
||||
.features = &.{
|
||||
"v1_1",
|
||||
},
|
||||
},
|
||||
.{
|
||||
.llvm_name = null,
|
||||
.zig_name = "pa_7150",
|
||||
.features = &.{
|
||||
"v1_1",
|
||||
},
|
||||
},
|
||||
.{
|
||||
.llvm_name = null,
|
||||
.zig_name = "pa_7100lc",
|
||||
.features = &.{
|
||||
"max_1",
|
||||
"v1_1",
|
||||
},
|
||||
},
|
||||
.{
|
||||
.llvm_name = null,
|
||||
.zig_name = "pa_7200",
|
||||
.features = &.{
|
||||
"v1_1",
|
||||
},
|
||||
},
|
||||
.{
|
||||
.llvm_name = null,
|
||||
.zig_name = "pa_7300lc",
|
||||
.features = &.{
|
||||
"max_1",
|
||||
"v1_1",
|
||||
},
|
||||
},
|
||||
.{
|
||||
.llvm_name = null,
|
||||
.zig_name = "pa_8000",
|
||||
.features = &.{
|
||||
"64bit",
|
||||
},
|
||||
},
|
||||
.{
|
||||
.llvm_name = null,
|
||||
.zig_name = "pa_8200",
|
||||
.features = &.{
|
||||
"64bit",
|
||||
},
|
||||
},
|
||||
.{
|
||||
.llvm_name = null,
|
||||
.zig_name = "pa_8500",
|
||||
.features = &.{
|
||||
"64bit",
|
||||
},
|
||||
},
|
||||
.{
|
||||
.llvm_name = null,
|
||||
.zig_name = "pa_8600",
|
||||
.features = &.{
|
||||
"64bit",
|
||||
},
|
||||
},
|
||||
.{
|
||||
.llvm_name = null,
|
||||
.zig_name = "pa_8700",
|
||||
.features = &.{
|
||||
"64bit",
|
||||
},
|
||||
},
|
||||
.{
|
||||
.llvm_name = null,
|
||||
.zig_name = "pa_8800",
|
||||
.features = &.{
|
||||
"64bit",
|
||||
},
|
||||
},
|
||||
.{
|
||||
.llvm_name = null,
|
||||
.zig_name = "pa_8900",
|
||||
.features = &.{
|
||||
"64bit",
|
||||
},
|
||||
},
|
||||
},
|
||||
},
|
||||
.{
|
||||
.zig_name = "kvx",
|
||||
.llvm = null,
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue