Merge pull request #25917 from alexrp/target-features

`std.Target`: add CPU features and models for alpha and hppa

lib/std/Target.zig

@@ -704,7 +704,7 @@ pub const Os = struct {
 };
 
 pub const aarch64 = @import("Target/aarch64.zig");
-pub const alpha = @import("Target/generic.zig");
+pub const alpha = @import("Target/alpha.zig");
 pub const amdgcn = @import("Target/amdgcn.zig");
 pub const arc = @import("Target/arc.zig");
 pub const arm = @import("Target/arm.zig");
@@ -712,7 +712,7 @@ pub const avr = @import("Target/avr.zig");
 pub const bpf = @import("Target/bpf.zig");
 pub const csky = @import("Target/csky.zig");
 pub const hexagon = @import("Target/hexagon.zig");
-pub const hppa = @import("Target/generic.zig");
+pub const hppa = @import("Target/hppa.zig");
 pub const kalimba = @import("Target/generic.zig");
 pub const kvx = @import("Target/kvx.zig");
 pub const lanai = @import("Target/lanai.zig");
@@ -1950,8 +1950,11 @@ pub const Cpu = struct {
         /// Clang compatibility is important, consider using `baseline` instead.
         pub fn generic(arch: Arch) *const Model {
             return switch (arch) {
+                .alpha => &alpha.cpu.ev4,
                 .amdgcn => &amdgcn.cpu.gfx600,
                 .avr => &avr.cpu.avr1,
+                .hppa => &hppa.cpu.ts_1,
+                .hppa64 => &hppa.cpu.pa_8000,
                 .kvx => &kvx.cpu.coolidge_v1,
                 .loongarch32 => &loongarch.cpu.generic_la32,
                 .loongarch64 => &loongarch.cpu.generic_la64,
@@ -1982,6 +1985,7 @@ pub const Cpu = struct {
         /// `Os.Tag.freestanding`.
         pub fn baseline(arch: Arch, os: Os) *const Model {
             return switch (arch) {
+                .alpha => &alpha.cpu.ev6,
                 .amdgcn => &amdgcn.cpu.gfx906,
                 .arm => switch (os.tag) {
                     .@"3ds" => &arm.cpu.mpcore,
@@ -2004,6 +2008,7 @@ pub const Cpu = struct {
                 .bpfel, .bpfeb => &bpf.cpu.v3,
                 .csky => &csky.cpu.ck810, // gcc/clang do not have a generic csky model.
                 .hexagon => &hexagon.cpu.hexagonv68, // gcc/clang do not have a generic hexagon model.
+                .hppa => &hppa.cpu.pa_7300lc,
                 .kvx => &kvx.cpu.coolidge_v2,
                 .lanai => &lanai.cpu.v11, // clang does not have a generic lanai model.
                 .loongarch64 => &loongarch.cpu.la64v1_0,

lib/std/Target/alpha.zig

@@ -0,0 +1,101 @@
+//! This file is auto-generated by tools/update_cpu_features.zig.
+
+const std = @import("../std.zig");
+const CpuFeature = std.Target.Cpu.Feature;
+const CpuModel = std.Target.Cpu.Model;
+
+pub const Feature = enum {
+    bwx,
+    cix,
+    fix,
+    max,
+};
+
+pub const featureSet = CpuFeature.FeatureSetFns(Feature).featureSet;
+pub const featureSetHas = CpuFeature.FeatureSetFns(Feature).featureSetHas;
+pub const featureSetHasAny = CpuFeature.FeatureSetFns(Feature).featureSetHasAny;
+pub const featureSetHasAll = CpuFeature.FeatureSetFns(Feature).featureSetHasAll;
+
+pub const all_features = blk: {
+    const len = @typeInfo(Feature).@"enum".fields.len;
+    std.debug.assert(len <= CpuFeature.Set.needed_bit_count);
+    var result: [len]CpuFeature = undefined;
+    result[@intFromEnum(Feature.bwx)] = .{
+        .llvm_name = null,
+        .description = "Enable byte/word extensions",
+        .dependencies = featureSet(&[_]Feature{}),
+    };
+    result[@intFromEnum(Feature.cix)] = .{
+        .llvm_name = null,
+        .description = "Enable counting extensions",
+        .dependencies = featureSet(&[_]Feature{}),
+    };
+    result[@intFromEnum(Feature.fix)] = .{
+        .llvm_name = null,
+        .description = "Enable floating point move and square root extensions",
+        .dependencies = featureSet(&[_]Feature{}),
+    };
+    result[@intFromEnum(Feature.max)] = .{
+        .llvm_name = null,
+        .description = "Enable motion video extensions",
+        .dependencies = featureSet(&[_]Feature{}),
+    };
+    const ti = @typeInfo(Feature);
+    for (&result, 0..) |*elem, i| {
+        elem.index = i;
+        elem.name = ti.@"enum".fields[i].name;
+    }
+    break :blk result;
+};
+
+pub const cpu = struct {
+    pub const ev4: CpuModel = .{
+        .name = "ev4",
+        .llvm_name = null,
+        .features = featureSet(&[_]Feature{}),
+    };
+    pub const ev45: CpuModel = .{
+        .name = "ev45",
+        .llvm_name = null,
+        .features = featureSet(&[_]Feature{}),
+    };
+    pub const ev5: CpuModel = .{
+        .name = "ev5",
+        .llvm_name = null,
+        .features = featureSet(&[_]Feature{}),
+    };
+    pub const ev56: CpuModel = .{
+        .name = "ev56",
+        .llvm_name = null,
+        .features = featureSet(&[_]Feature{
+            .bwx,
+        }),
+    };
+    pub const ev6: CpuModel = .{
+        .name = "ev6",
+        .llvm_name = null,
+        .features = featureSet(&[_]Feature{
+            .bwx,
+            .fix,
+            .max,
+        }),
+    };
+    pub const ev67: CpuModel = .{
+        .name = "ev67",
+        .llvm_name = null,
+        .features = featureSet(&[_]Feature{
+            .bwx,
+            .cix,
+            .fix,
+            .max,
+        }),
+    };
+    pub const pca56: CpuModel = .{
+        .name = "pca56",
+        .llvm_name = null,
+        .features = featureSet(&[_]Feature{
+            .bwx,
+            .max,
+        }),
+    };
+};

lib/std/Target/hppa.zig

@@ -0,0 +1,178 @@
+//! This file is auto-generated by tools/update_cpu_features.zig.
+
+const std = @import("../std.zig");
+const CpuFeature = std.Target.Cpu.Feature;
+const CpuModel = std.Target.Cpu.Model;
+
+pub const Feature = enum {
+    @"64bit",
+    max_1,
+    max_2,
+    v1_1,
+    v2_0,
+};
+
+pub const featureSet = CpuFeature.FeatureSetFns(Feature).featureSet;
+pub const featureSetHas = CpuFeature.FeatureSetFns(Feature).featureSetHas;
+pub const featureSetHasAny = CpuFeature.FeatureSetFns(Feature).featureSetHasAny;
+pub const featureSetHasAll = CpuFeature.FeatureSetFns(Feature).featureSetHasAll;
+
+pub const all_features = blk: {
+    const len = @typeInfo(Feature).@"enum".fields.len;
+    std.debug.assert(len <= CpuFeature.Set.needed_bit_count);
+    var result: [len]CpuFeature = undefined;
+    result[@intFromEnum(Feature.@"64bit")] = .{
+        .llvm_name = null,
+        .description = "Enable 64-bit PA-RISC 2.0",
+        .dependencies = featureSet(&[_]Feature{
+            .v2_0,
+        }),
+    };
+    result[@intFromEnum(Feature.max_1)] = .{
+        .llvm_name = null,
+        .description = "Enable MAX-1 multimedia acceleration extensions",
+        .dependencies = featureSet(&[_]Feature{}),
+    };
+    result[@intFromEnum(Feature.max_2)] = .{
+        .llvm_name = null,
+        .description = "Enable MAX-2 multimedia acceleration extensions",
+        .dependencies = featureSet(&[_]Feature{
+            .max_1,
+        }),
+    };
+    result[@intFromEnum(Feature.v1_1)] = .{
+        .llvm_name = null,
+        .description = "Enable ISA v1.1",
+        .dependencies = featureSet(&[_]Feature{}),
+    };
+    result[@intFromEnum(Feature.v2_0)] = .{
+        .llvm_name = null,
+        .description = "Enable ISA v2.0",
+        .dependencies = featureSet(&[_]Feature{
+            .max_2,
+            .v1_1,
+        }),
+    };
+    const ti = @typeInfo(Feature);
+    for (&result, 0..) |*elem, i| {
+        elem.index = i;
+        elem.name = ti.@"enum".fields[i].name;
+    }
+    break :blk result;
+};
+
+pub const cpu = struct {
+    pub const ns_1: CpuModel = .{
+        .name = "ns_1",
+        .llvm_name = null,
+        .features = featureSet(&[_]Feature{}),
+    };
+    pub const ns_2: CpuModel = .{
+        .name = "ns_2",
+        .llvm_name = null,
+        .features = featureSet(&[_]Feature{}),
+    };
+    pub const pa_7000: CpuModel = .{
+        .name = "pa_7000",
+        .llvm_name = null,
+        .features = featureSet(&[_]Feature{
+            .v1_1,
+        }),
+    };
+    pub const pa_7100: CpuModel = .{
+        .name = "pa_7100",
+        .llvm_name = null,
+        .features = featureSet(&[_]Feature{
+            .v1_1,
+        }),
+    };
+    pub const pa_7100lc: CpuModel = .{
+        .name = "pa_7100lc",
+        .llvm_name = null,
+        .features = featureSet(&[_]Feature{
+            .max_1,
+            .v1_1,
+        }),
+    };
+    pub const pa_7150: CpuModel = .{
+        .name = "pa_7150",
+        .llvm_name = null,
+        .features = featureSet(&[_]Feature{
+            .v1_1,
+        }),
+    };
+    pub const pa_7200: CpuModel = .{
+        .name = "pa_7200",
+        .llvm_name = null,
+        .features = featureSet(&[_]Feature{
+            .v1_1,
+        }),
+    };
+    pub const pa_7300lc: CpuModel = .{
+        .name = "pa_7300lc",
+        .llvm_name = null,
+        .features = featureSet(&[_]Feature{
+            .max_1,
+            .v1_1,
+        }),
+    };
+    pub const pa_8000: CpuModel = .{
+        .name = "pa_8000",
+        .llvm_name = null,
+        .features = featureSet(&[_]Feature{
+            .@"64bit",
+        }),
+    };
+    pub const pa_8200: CpuModel = .{
+        .name = "pa_8200",
+        .llvm_name = null,
+        .features = featureSet(&[_]Feature{
+            .@"64bit",
+        }),
+    };
+    pub const pa_8500: CpuModel = .{
+        .name = "pa_8500",
+        .llvm_name = null,
+        .features = featureSet(&[_]Feature{
+            .@"64bit",
+        }),
+    };
+    pub const pa_8600: CpuModel = .{
+        .name = "pa_8600",
+        .llvm_name = null,
+        .features = featureSet(&[_]Feature{
+            .@"64bit",
+        }),
+    };
+    pub const pa_8700: CpuModel = .{
+        .name = "pa_8700",
+        .llvm_name = null,
+        .features = featureSet(&[_]Feature{
+            .@"64bit",
+        }),
+    };
+    pub const pa_8800: CpuModel = .{
+        .name = "pa_8800",
+        .llvm_name = null,
+        .features = featureSet(&[_]Feature{
+            .@"64bit",
+        }),
+    };
+    pub const pa_8900: CpuModel = .{
+        .name = "pa_8900",
+        .llvm_name = null,
+        .features = featureSet(&[_]Feature{
+            .@"64bit",
+        }),
+    };
+    pub const pcx: CpuModel = .{
+        .name = "pcx",
+        .llvm_name = null,
+        .features = featureSet(&[_]Feature{}),
+    };
+    pub const ts_1: CpuModel = .{
+        .name = "ts_1",
+        .llvm_name = null,
+        .features = featureSet(&[_]Feature{}),
+    };
+};

lib/std/Target/x86.zig

@@ -3081,13 +3081,6 @@ pub const cpu = struct {
             .xsaveopt,
         }),
     };
-    pub const @"i86": CpuModel = .{
-        .name = "i86",
-        .llvm_name = null,
-        .features = featureSet(&[_]Feature{
-            .@"16bit_mode",
-        }),
-    };
     pub const @"i386": CpuModel = .{
         .name = "i386",
         .llvm_name = "i386",
@@ -3129,6 +3122,13 @@ pub const cpu = struct {
             .x87,
         }),
     };
+    pub const @"i86": CpuModel = .{
+        .name = "i86",
+        .llvm_name = null,
+        .features = featureSet(&[_]Feature{
+            .@"16bit_mode",
+        }),
+    };
     pub const icelake_client: CpuModel = .{
         .name = "icelake_client",
         .llvm_name = "icelake-client",

tools/update_cpu_features.zig

@@ -393,6 +393,83 @@ const targets = [_]ArchTarget{
             "apple-latest",
         },
     },
+    .{
+        .zig_name = "alpha",
+        .llvm = null,
+        .extra_features = &.{
+            .{
+                .zig_name = "bwx",
+                .desc = "Enable byte/word extensions",
+                .deps = &.{},
+            },
+            .{
+                .zig_name = "cix",
+                .desc = "Enable counting extensions",
+                .deps = &.{},
+            },
+            .{
+                .zig_name = "fix",
+                .desc = "Enable floating point move and square root extensions",
+                .deps = &.{},
+            },
+            .{
+                .zig_name = "max",
+                .desc = "Enable motion video extensions",
+                .deps = &.{},
+            },
+        },
+        .extra_cpus = &.{
+            .{
+                .llvm_name = null,
+                .zig_name = "ev4",
+                .features = &.{},
+            },
+            .{
+                .llvm_name = null,
+                .zig_name = "ev45",
+                .features = &.{},
+            },
+            .{
+                .llvm_name = null,
+                .zig_name = "ev5",
+                .features = &.{},
+            },
+            .{
+                .llvm_name = null,
+                .zig_name = "ev56",
+                .features = &.{
+                    "bwx",
+                },
+            },
+            .{
+                .llvm_name = null,
+                .zig_name = "pca56",
+                .features = &.{
+                    "bwx",
+                    "max",
+                },
+            },
+            .{
+                .llvm_name = null,
+                .zig_name = "ev6",
+                .features = &.{
+                    "bwx",
+                    "fix",
+                    "max",
+                },
+            },
+            .{
+                .llvm_name = null,
+                .zig_name = "ev67",
+                .features = &.{
+                    "bwx",
+                    "cix",
+                    "fix",
+                    "max",
+                },
+            },
+        },
+    },
     .{
         .zig_name = "amdgcn",
         .llvm = .{
@@ -973,6 +1050,152 @@ const targets = [_]ArchTarget{
             .td_name = "Hexagon",
         },
     },
+    .{
+        .zig_name = "hppa",
+        .llvm = null,
+        .extra_features = &.{
+            .{
+                .zig_name = "64bit",
+                .desc = "Enable 64-bit PA-RISC 2.0",
+                .deps = &.{"v2_0"},
+            },
+            .{
+                .zig_name = "max_1",
+                .desc = "Enable MAX-1 multimedia acceleration extensions",
+                .deps = &.{},
+            },
+            .{
+                .zig_name = "max_2",
+                .desc = "Enable MAX-2 multimedia acceleration extensions",
+                .deps = &.{"max_1"},
+            },
+            .{
+                .zig_name = "v1_1",
+                .desc = "Enable ISA v1.1",
+                .deps = &.{},
+            },
+            .{
+                .zig_name = "v2_0",
+                .desc = "Enable ISA v2.0",
+                .deps = &.{ "max_2", "v1_1" },
+            },
+        },
+        .extra_cpus = &.{
+            .{
+                .llvm_name = null,
+                .zig_name = "ts_1",
+                .features = &.{},
+            },
+            .{
+                .llvm_name = null,
+                .zig_name = "ns_1",
+                .features = &.{},
+            },
+            .{
+                .llvm_name = null,
+                .zig_name = "ns_2",
+                .features = &.{},
+            },
+            .{
+                .llvm_name = null,
+                .zig_name = "pcx",
+                .features = &.{},
+            },
+            .{
+                .llvm_name = null,
+                .zig_name = "pa_7000",
+                .features = &.{
+                    "v1_1",
+                },
+            },
+            .{
+                .llvm_name = null,
+                .zig_name = "pa_7100",
+                .features = &.{
+                    "v1_1",
+                },
+            },
+            .{
+                .llvm_name = null,
+                .zig_name = "pa_7150",
+                .features = &.{
+                    "v1_1",
+                },
+            },
+            .{
+                .llvm_name = null,
+                .zig_name = "pa_7100lc",
+                .features = &.{
+                    "max_1",
+                    "v1_1",
+                },
+            },
+            .{
+                .llvm_name = null,
+                .zig_name = "pa_7200",
+                .features = &.{
+                    "v1_1",
+                },
+            },
+            .{
+                .llvm_name = null,
+                .zig_name = "pa_7300lc",
+                .features = &.{
+                    "max_1",
+                    "v1_1",
+                },
+            },
+            .{
+                .llvm_name = null,
+                .zig_name = "pa_8000",
+                .features = &.{
+                    "64bit",
+                },
+            },
+            .{
+                .llvm_name = null,
+                .zig_name = "pa_8200",
+                .features = &.{
+                    "64bit",
+                },
+            },
+            .{
+                .llvm_name = null,
+                .zig_name = "pa_8500",
+                .features = &.{
+                    "64bit",
+                },
+            },
+            .{
+                .llvm_name = null,
+                .zig_name = "pa_8600",
+                .features = &.{
+                    "64bit",
+                },
+            },
+            .{
+                .llvm_name = null,
+                .zig_name = "pa_8700",
+                .features = &.{
+                    "64bit",
+                },
+            },
+            .{
+                .llvm_name = null,
+                .zig_name = "pa_8800",
+                .features = &.{
+                    "64bit",
+                },
+            },
+            .{
+                .llvm_name = null,
+                .zig_name = "pa_8900",
+                .features = &.{
+                    "64bit",
+                },
+            },
+        },
+    },
     .{
         .zig_name = "kvx",
         .llvm = null,