From cb1ac0bb2fb95424118404160704d53a3ff2a2c0 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Alex=20R=C3=B8nne=20Petersen?= Date: Tue, 1 Oct 2024 06:27:27 +0200 Subject: [PATCH] update_cpu_features: Don't delete the output file if there are no CPU features. At bare minimum, the compiler expects std.Target..cpu.generic to work for any given architecture when generating the builtin module. So rather than try to hack that into working when the affected modules are omitted, just actually keep them. This affected lanai and xcore. --- lib/std/Target.zig | 8 ++++++++ lib/std/Target/lanai.zig | 37 +++++++++++++++++++++++++++++++++++ lib/std/Target/xcore.zig | 37 +++++++++++++++++++++++++++++++++++ tools/update_cpu_features.zig | 13 ++++-------- 4 files changed, 86 insertions(+), 9 deletions(-) create mode 100644 lib/std/Target/lanai.zig create mode 100644 lib/std/Target/xcore.zig diff --git a/lib/std/Target.zig b/lib/std/Target.zig index 146af1cf9f..ab6198f9c7 100644 --- a/lib/std/Target.zig +++ b/lib/std/Target.zig @@ -633,6 +633,7 @@ pub const avr = @import("Target/avr.zig"); pub const bpf = @import("Target/bpf.zig"); pub const csky = @import("Target/csky.zig"); pub const hexagon = @import("Target/hexagon.zig"); +pub const lanai = @import("Target/lanai.zig"); pub const loongarch = @import("Target/loongarch.zig"); pub const m68k = @import("Target/m68k.zig"); pub const mips = @import("Target/mips.zig"); @@ -646,6 +647,7 @@ pub const s390x = @import("Target/s390x.zig"); pub const ve = @import("Target/ve.zig"); pub const wasm = @import("Target/wasm.zig"); pub const x86 = @import("Target/x86.zig"); +pub const xcore = @import("Target/xcore.zig"); pub const xtensa = @import("Target/xtensa.zig"); pub const Abi = enum { @@ -1410,6 +1412,7 @@ pub const Cpu = struct { .bpfel, .bpfeb => &bpf.all_features, .csky => &csky.all_features, .hexagon => &hexagon.all_features, + .lanai => &lanai.all_features, .loongarch32, .loongarch64 => &loongarch.all_features, .m68k => &m68k.all_features, .mips, .mipsel, .mips64, .mips64el => &mips.all_features, @@ -1421,6 +1424,7 @@ pub const Cpu = struct { .spirv, .spirv32, .spirv64 => &spirv.all_features, .s390x => &s390x.all_features, .x86, .x86_64 => &x86.all_features, + .xcore => &xcore.all_features, .xtensa => &xtensa.all_features, .nvptx, .nvptx64 => &nvptx.all_features, .ve => &ve.all_features, @@ -1440,6 +1444,7 @@ pub const Cpu = struct { .bpfel, .bpfeb => comptime allCpusFromDecls(bpf.cpu), .csky => comptime allCpusFromDecls(csky.cpu), .hexagon => comptime allCpusFromDecls(hexagon.cpu), + .lanai => comptime allCpusFromDecls(lanai.cpu), .loongarch32, .loongarch64 => comptime allCpusFromDecls(loongarch.cpu), .m68k => comptime allCpusFromDecls(m68k.cpu), .mips, .mipsel, .mips64, .mips64el => comptime allCpusFromDecls(mips.cpu), @@ -1451,6 +1456,7 @@ pub const Cpu = struct { .spirv, .spirv32, .spirv64 => comptime allCpusFromDecls(spirv.cpu), .s390x => comptime allCpusFromDecls(s390x.cpu), .x86, .x86_64 => comptime allCpusFromDecls(x86.cpu), + .xcore => comptime allCpusFromDecls(xcore.cpu), .xtensa => comptime allCpusFromDecls(xtensa.cpu), .nvptx, .nvptx64 => comptime allCpusFromDecls(nvptx.cpu), .ve => comptime allCpusFromDecls(ve.cpu), @@ -1525,6 +1531,7 @@ pub const Cpu = struct { .avr => &avr.cpu.avr2, .bpfel, .bpfeb => &bpf.cpu.generic, .hexagon => &hexagon.cpu.generic, + .lanai => &lanai.cpu.generic, .loongarch32 => &loongarch.cpu.generic_la32, .loongarch64 => &loongarch.cpu.generic_la64, .m68k => &m68k.cpu.generic, @@ -1547,6 +1554,7 @@ pub const Cpu = struct { .nvptx, .nvptx64 => &nvptx.cpu.sm_20, .ve => &ve.cpu.generic, .wasm32, .wasm64 => &wasm.cpu.generic, + .xcore => &xcore.cpu.generic, else => &S.generic_model, }; diff --git a/lib/std/Target/lanai.zig b/lib/std/Target/lanai.zig new file mode 100644 index 0000000000..041934b6d4 --- /dev/null +++ b/lib/std/Target/lanai.zig @@ -0,0 +1,37 @@ +//! This file is auto-generated by tools/update_cpu_features.zig. + +const std = @import("../std.zig"); +const CpuFeature = std.Target.Cpu.Feature; +const CpuModel = std.Target.Cpu.Model; + +pub const Feature = enum {}; + +pub const featureSet = CpuFeature.FeatureSetFns(Feature).featureSet; +pub const featureSetHas = CpuFeature.FeatureSetFns(Feature).featureSetHas; +pub const featureSetHasAny = CpuFeature.FeatureSetFns(Feature).featureSetHasAny; +pub const featureSetHasAll = CpuFeature.FeatureSetFns(Feature).featureSetHasAll; + +pub const all_features = blk: { + const len = @typeInfo(Feature).@"enum".fields.len; + std.debug.assert(len <= CpuFeature.Set.needed_bit_count); + var result: [len]CpuFeature = undefined; + const ti = @typeInfo(Feature); + for (&result, 0..) |*elem, i| { + elem.index = i; + elem.name = ti.@"enum".fields[i].name; + } + break :blk result; +}; + +pub const cpu = struct { + pub const generic = CpuModel{ + .name = "generic", + .llvm_name = "generic", + .features = featureSet(&[_]Feature{}), + }; + pub const v11 = CpuModel{ + .name = "v11", + .llvm_name = "v11", + .features = featureSet(&[_]Feature{}), + }; +}; diff --git a/lib/std/Target/xcore.zig b/lib/std/Target/xcore.zig new file mode 100644 index 0000000000..4069620849 --- /dev/null +++ b/lib/std/Target/xcore.zig @@ -0,0 +1,37 @@ +//! This file is auto-generated by tools/update_cpu_features.zig. + +const std = @import("../std.zig"); +const CpuFeature = std.Target.Cpu.Feature; +const CpuModel = std.Target.Cpu.Model; + +pub const Feature = enum {}; + +pub const featureSet = CpuFeature.FeatureSetFns(Feature).featureSet; +pub const featureSetHas = CpuFeature.FeatureSetFns(Feature).featureSetHas; +pub const featureSetHasAny = CpuFeature.FeatureSetFns(Feature).featureSetHasAny; +pub const featureSetHasAll = CpuFeature.FeatureSetFns(Feature).featureSetHasAll; + +pub const all_features = blk: { + const len = @typeInfo(Feature).@"enum".fields.len; + std.debug.assert(len <= CpuFeature.Set.needed_bit_count); + var result: [len]CpuFeature = undefined; + const ti = @typeInfo(Feature); + for (&result, 0..) |*elem, i| { + elem.index = i; + elem.name = ti.@"enum".fields[i].name; + } + break :blk result; +}; + +pub const cpu = struct { + pub const generic = CpuModel{ + .name = "generic", + .llvm_name = "generic", + .features = featureSet(&[_]Feature{}), + }; + pub const xs1b_generic = CpuModel{ + .name = "xs1b_generic", + .llvm_name = "xs1b-generic", + .features = featureSet(&[_]Feature{}), + }; +}; diff --git a/tools/update_cpu_features.zig b/tools/update_cpu_features.zig index 63637d8f78..2681743df0 100644 --- a/tools/update_cpu_features.zig +++ b/tools/update_cpu_features.zig @@ -1563,12 +1563,6 @@ fn processOneTarget(job: Job) anyerror!void { const zig_code_basename = try std.fmt.allocPrint(arena, "{s}.zig", .{llvm_target.zig_name}); - if (all_features.items.len == 0) { - // We represent this with an empty file. - try target_dir.deleteTree(zig_code_basename); - return; - } - var zig_code_file = try target_dir.createFile(zig_code_basename, .{}); defer zig_code_file.close(); @@ -1583,11 +1577,12 @@ fn processOneTarget(job: Job) anyerror!void { \\const CpuModel = std.Target.Cpu.Model; \\ \\pub const Feature = enum { - \\ ); - for (all_features.items) |feature| { - try w.print(" {p},\n", .{std.zig.fmtId(feature.zig_name)}); + for (all_features.items, 0..) |feature, i| { + try w.print("\n {p},", .{std.zig.fmtId(feature.zig_name)}); + + if (i == all_features.items.len - 1) try w.writeAll("\n"); } try w.writeAll(