stage2_wasm: revival, enabling tests

src/codegen/wasm/Emit.zig

@@ -85,7 +85,7 @@ pub fn lowerToCode(emit: *Emit) Error!void {
             if (is_obj) {
                 @panic("TODO");
             } else {
-                writeUleb128(code, 1 + @intFromEnum(indirect_func_idx));
+                writeSleb128(code, 1 + @intFromEnum(indirect_func_idx));
             }
             inst += 1;
             continue :loop tags[inst];

src/link/Wasm/Flush.zig

@@ -933,6 +933,7 @@ pub fn finish(f: *Flush, wasm: *Wasm) !void {
         var segment_offset: u32 = 0;
         var group_start_addr: u32 = data_vaddr;
         var group_end_addr = f.data_segment_groups.items[group_index].end_addr;
+        var first_segment_in_group = true;
         for (segment_ids, segment_vaddrs) |segment_id, segment_vaddr| {
             if (segment_vaddr >= group_end_addr) {
                 try binary_bytes.appendNTimes(gpa, 0, group_end_addr - group_start_addr - segment_offset);
@@ -944,8 +945,10 @@ pub fn finish(f: *Flush, wasm: *Wasm) !void {
                 group_start_addr = group_end_addr;
                 group_end_addr = f.data_segment_groups.items[group_index].end_addr;
                 segment_offset = 0;
+                first_segment_in_group = true;
             }
-            if (segment_offset == 0) {
+            if (first_segment_in_group) {
+                first_segment_in_group = false;
                 const group_size = group_end_addr - group_start_addr;
                 log.debug("emit data section group, {d} bytes", .{group_size});
                 const flags: Object.DataSegmentFlags = if (segment_id.isPassive(wasm)) .passive else .active;

test/behavior/enum.zig

@@ -1066,6 +1066,7 @@ test "tag name with signed enum values" {
 test "tag name with large enum values" {
     if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest;
     if (builtin.zig_backend == .stage2_c) return error.SkipZigTest;
+    if (builtin.zig_backend == .stage2_wasm) return error.SkipZigTest;
 
     const Kdf = enum(u128) {
         aes_kdf = 0xea4f8ac1080d74bf60448a629af3d9c9,

test/behavior/field_parent_ptr.zig

@@ -1033,6 +1033,7 @@ test "@fieldParentPtr packed struct first zero-bit field" {
     if (builtin.zig_backend == .stage2_spirv) return error.SkipZigTest;
     if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
     if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest;
+    if (builtin.zig_backend == .stage2_wasm) return error.SkipZigTest;
 
     const C = packed struct {
         a: u0 = 0,
@@ -1139,6 +1140,7 @@ test "@fieldParentPtr packed struct middle zero-bit field" {
     if (builtin.zig_backend == .stage2_spirv) return error.SkipZigTest;
     if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
     if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest;
+    if (builtin.zig_backend == .stage2_wasm) return error.SkipZigTest;
 
     const C = packed struct {
         a: f32 = 3.14,
@@ -1245,6 +1247,7 @@ test "@fieldParentPtr packed struct last zero-bit field" {
     if (builtin.zig_backend == .stage2_spirv) return error.SkipZigTest;
     if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
     if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest;
+    if (builtin.zig_backend == .stage2_wasm) return error.SkipZigTest;
 
     const C = packed struct {
         a: f32 = 3.14,

test/behavior/struct.zig

@@ -749,6 +749,7 @@ test "packed struct with fp fields" {
     if (builtin.zig_backend == .stage2_spirv) return error.SkipZigTest;
     if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
     if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest;
+    if (builtin.zig_backend == .stage2_wasm) return error.SkipZigTest;
 
     const S = packed struct {
         data0: f32,

test/behavior/union.zig

@@ -2217,6 +2217,7 @@ test "matching captures causes union equivalence" {
 test "signed enum tag with negative value" {
     if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest; // TODO
     if (builtin.zig_backend == .stage2_spirv) return error.SkipZigTest;
+    if (builtin.zig_backend == .stage2_wasm) return error.SkipZigTest;
     if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;
 
     const Enum = enum(i8) {

test/behavior/vector.zig

@@ -9,6 +9,7 @@ const expectEqual = std.testing.expectEqual;
 test "implicit cast vector to array - bool" {
     if (builtin.cpu.arch == .aarch64_be and builtin.zig_backend == .stage2_llvm) return error.SkipZigTest;
     if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest;
+    if (builtin.zig_backend == .stage2_wasm) return error.SkipZigTest;
 
     const S = struct {
         fn doTheTest() !void {
@@ -32,6 +33,7 @@ test "implicit cast vector to array - bool" {
 
 test "implicit cast array to vector - bool" {
     if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest;
+    if (builtin.zig_backend == .stage2_wasm) return error.SkipZigTest;
 
     const S = struct {
         fn doTheTest() !void {

test/src/Cases.zig

@@ -370,10 +370,6 @@ fn addFromDirInner(
             const resolved_target = b.resolveTargetQuery(target_query);
             const target = &resolved_target.result;
             for (backends) |backend| {
-                if (backend == .selfhosted and target.cpu.arch == .wasm32) {
-                    // https://github.com/ziglang/zig/issues/25684
-                    continue;
-                }
                 if (backend == .selfhosted and
                     target.cpu.arch != .aarch64 and target.cpu.arch != .wasm32 and target.cpu.arch != .x86_64 and target.cpu.arch != .spirv64)
                 {

test/tests.zig

@@ -1381,18 +1381,16 @@ const test_targets = blk: {
 
         // WASI Targets
 
-        // Disabled due to no active maintainer (feel free to fix the failures
+        .{
-        // and then re-enable at any time). The failures occur due to backend
+            .target = .{
-        // miscompilation of different AIR from the frontend.
+                .cpu_arch = .wasm32,
-        //.{
+                .os_tag = .wasi,
-        //    .target = .{
+                .abi = .none,
-        //        .cpu_arch = .wasm32,
+            },
-        //        .os_tag = .wasi,
+            .skip_modules = &.{ "compiler-rt", "std" },
-        //        .abi = .none,
+            .use_llvm = false,
-        //    },
+            .use_lld = false,
-        //    .use_llvm = false,
+        },
-        //    .use_lld = false,
-        //},
         .{
             .target = .{
                 .cpu_arch = .wasm32,