Commit graph

146 commits

Author SHA1 Message Date
Jakub Konka
6bf67eada4 arm: lock dest register in shl_overflow so that we do not spill it
Nerf two tests - they will require further investigation, but arm
now passes all tests with the safety PR.
2022-05-07 22:53:17 +02:00
Jakub Konka
ac954eb539 regalloc: ensure we only freeze/unfreeze at the outermost scope
This prevents a nasty type of bugs where we accidentally unfreeze
a register that was frozen purposely in the outer scope, risking
accidental realloc of a taken register.

Fix CF flags spilling on aarch64 backend.
2022-05-07 00:57:55 +02:00
Andrew Kelley
0bebb688fb stage2: change max int align from 8 to 16 for more ISAs
These targets now have a similar disagreement with LLVM about the
alignment of 128-bit integers as x86_64:
 * riscv64
 * powerpc64
 * powerpc64le
 * mips64
 * mips64el
 * sparcv9

See #2987
2022-05-04 19:11:02 -07:00
Andrew Kelley
af7e945a7d stage2: fix @sizeOf for structs with comptime fields 2022-05-04 18:45:59 -07:00
Andrew Kelley
f21c11a7f7 stage2: change x86_64 max int alignment from 8 to 16
For x86_64, LLVMABIAlignmentOfType(i128) reports 8. However I think 16
is a better number for two reasons:
1. Better machine code when loading into SIMD register.
2. The C ABI wants 16 for extern structs.
2022-05-04 17:34:17 -07:00
Andrew Kelley
259f784241 stage2: improve @sizeOf and @alignOf integers
Prior to this commit, the logic for ABI size and ABI alignment for
integers was naive and incorrect. This results in wasted hardware as
well as undefined behavior in the LLVM backend when we memset an
incorrect number of bytes to 0xaa due to disagreeing with LLVM about the
ABI size of integers.

This commit introduces a "max int align" value which is different per
Target. This value is used to derive the ABI size and alignment of all
integers.

This commit makes an interesting change from stage1, which treats
128-bit integers as 16-bytes aligned for x86_64-linux. stage1 is
incorrect. The maximum integer alignment on this system is only 8 bytes.
This change breaks the behavior test called "128-bit cmpxchg" because on
that target, 128-bit cmpxchg does require a 16-bytes aligned pointer to
a 128 bit integer. However, this alignment property does not belong on
*all* 128 bit integers - only on the pointer type in the `@cmpxchg`
builtin function prototype. The user can then use an alignment override
annotation on a 128-bit integer variable or struct field to obtain such
a pointer.
2022-05-04 17:34:16 -07:00
Cody Tapscott
19331b323d stage2: Correctly align decls for comptime allocs
This updates WipAnonDecl to require an alignment provided by the caller,
which is needed for explicitly aligned comptime allocs.
2022-03-19 19:41:23 -04:00
joachimschmidt557
3ecba7d7a2
stage2 ARM: implement slice_elem_ptr, ptr_elem_ptr 2022-03-18 12:12:14 +01:00
joachimschmidt557
b74cd902c6
stage2 AArch64: enable mul for ints with <= 64 bits 2022-03-13 11:32:08 +01:00
Andrew Kelley
0bc9635490 stage2: add debug info for locals in the LLVM backend
Adds 2 new AIR instructions:
 * dbg_var_ptr
 * dbg_var_val

Sema no longer emits dbg_stmt AIR instructions when strip=true.

LLVM backend: fixed lowerPtrToVoid when calling ptrAlignment on
the element type is problematic.

LLVM backend: fixed alloca instructions improperly getting debug
location annotated, causing chaotic debug info behavior.

zig_llvm.cpp: fixed incorrect bindings for a function that should use
unsigned integers for line and column.

A bunch of C test cases regressed because the new dbg_var AIR
instructions caused their operands to be alive, exposing latent bugs.
Mostly it's just a problem that the C backend lowers mutable
and const slices to the same C type, so we need to represent that in the
C backend instead of printing two duplicate typedefs.
2022-03-13 03:41:31 -04:00
Andrew Kelley
f736cde397 Sema: implement pointer to tuple to pointer to array coercion
This involved an LLVM backend fix for the aggregate_init instruction.
2022-03-09 18:49:37 -07:00
Andrew Kelley
f32a77b30d Sema: implement pointer-to-tuple coercion to slice and struct 2022-03-09 17:33:01 -07:00
Luuk de Gram
90f08a69aa wasm: Enable passing behavior tests
This also adds some float-related instructions to MIR/Emit
2022-03-09 13:53:20 -07:00
joachimschmidt557
3ea603c82a stage2 ARM: implement ptr_add, ptr_sub for all element sizes
Also reduces slice_elem_val to ptr_add, simplifying the implementation
2022-03-08 10:54:08 +01:00
Luuk de Gram
70fc6e3776
wasm: call into generateSymbol when lowering
This also unifies the wasm backend to use `generateSymbol` when lowering a constant
that cannot be lowered to an immediate value.
As both decls and constants are now refactored, the old `genTypedValue` is removed.
2022-03-06 19:38:53 +01:00
joachimschmidt557
a06e9eca45
stage2 AArch64: add more slice support
* airSlice
* airArrayToSlice
* and initial support for airSlicePtr and co
2022-03-05 11:31:51 +01:00
joachimschmidt557
d486a7b811 stage2 ARM: generate less no-op branches
The checks detecting such no-op branches (essentially instructions
that branch to the instruction immediately following the branch) were
tightened to catch more of these occurrences.
2022-03-04 23:28:14 +01:00
Jakub Konka
ec54ceee6d
Merge pull request #11016 from ziglang/x64-more-codegen 2022-03-01 09:14:23 +01:00
Andrew Kelley
157f66ec07 Sema: fix pointer type hash and equality functions
Several issues with pointer types are fixed:

Prior to this commit, Zig would not canonicalize a pointer type with
an explicit alignment to alignment=0 if it matched the pointee ABI
alignment. In order to fix this, `Type.ptr` now takes a Target
parameter. I also moved the host_size canonicalization to `Type.ptr`
since target is now available. Similarly, is_allowzero in the case of
C pointers is now treated as a canonicalization done by the function
rather than a precondition.

in-memory coercion for pointers now properly checks ABI alignment
of pointee types instead of incorrectly treating the 0 value as an
alignment.

Type equality is completely reworked based on the tag() rather than the
zigTypeTag(). It's still semantically based on zigTypeTag() but that
knowledge is implied rather than dictating the control flow of the
logic. Importantly, this fixes cases for opaques, structs, tuples,
enums, and unions, where type equality was incorrectly returning based
on whether the tag() values were equal.

Additionally, pointer type equality now takes into account alignment.
Because we canonicalize non-zero alignment which equals pointee type ABI
alignment to alignment=0, this now can be a simple integer comparison.

Type hashing is implemented for pointers and floats. Array types now
additionally hash their sentinels.

This regressed some behavior tests that were passing but only because
of bugs regarding type equality.

The C backend has a noticeable problem with lowering differently-aligned
pointers (particularly slices) as the same type, causing C compilation
errors due to duplicate declarations.
2022-02-28 19:22:16 -07:00
Jakub Konka
cfbc3537ef x64: pass more behavior tests 2022-02-28 23:20:05 +01:00
joachimschmidt557
91fbcf7093
stage2 ARM: enable more behavior tests 2022-02-27 21:38:56 +01:00
Jakub Konka
1b8ed7842c macho: redo selection of segment/section for decls and consts
* fix alignment issues for consts with natural ABI alignment not
  matching that of the `ldr` instruction in `aarch64` - solved by
  preceeding the `ldr` with an additional `add` instruction to form
  the full address before dereferencing the pointer.
* redo selection of segment/section for decls and consts based on
  combined type and value
2022-02-25 21:59:19 +01:00
joachimschmidt557
f91fe9afb9
stage2 AArch64: more support for MCValue.got_load and direct_load 2022-02-23 21:58:13 +01:00
Jakub Konka
25e4b16e25 Port more behavior tests 2022-02-22 21:57:42 +01:00
joachimschmidt557
25f73224f7
stage2 AArch64: pass a few more behavior tests 2022-02-21 23:05:16 +01:00
joachimschmidt557
2ba1ef165a
stage2 AArch64: implement genSetReg for ptr_stack_offset 2022-02-21 22:54:14 +01:00
Jakub Konka
3193cc1c1e x64: fix ptr_add and ptr_sub
Add standalone implementation of operand reuse for ptr related
arithmetic operations of add and sub.
2022-02-17 15:07:42 +01:00
Jakub Konka
78e6f9c44c x64: fix ptr_add
However, still missing is taking into account pointer alignment
when performing arithmetic.
2022-02-16 14:13:06 +01:00
joachimschmidt557
22895f5616
stage2 AArch64: Enable behavior testing 2022-02-14 22:33:01 +01:00
joachimschmidt557
6b0c950cb8
stage2 ARM: support all integer types in genTypedValue 2022-02-08 21:02:50 +01:00
Jakub Konka
5944e89016 stage2: lower unnamed constants in Elf and MachO
* link: add a virtual function `lowerUnnamedConsts`, similar to
  `updateFunc` or `updateDecl` which needs to be implemented by the
  linker backend in order to be used with the `CodeGen` code
* elf: implement `lowerUnnamedConsts` specialization where we
  lower unnamed constants to `.rodata` section. We keep track of the
  atoms encompassing the lowered unnamed consts in a global table
  indexed by parent `Decl`. When the `Decl` is updated or destroyed,
  we clear the unnamed consts referenced within the `Decl`.
* macho: implement `lowerUnnamedConsts` specialization where we
  lower unnamed constants to `__TEXT,__const` section. We keep track of the
  atoms encompassing the lowered unnamed consts in a global table
  indexed by parent `Decl`. When the `Decl` is updated or destroyed,
  we clear the unnamed consts referenced within the `Decl`.
* x64: change `MCValue.linker_sym_index` into two `MCValue`s: `.got_load` and
  `.direct_load`. The former signifies to the emitter that it should
  emit a GOT load relocation, while the latter that it should emit
  a direct load (`SIGNED`) relocation.
* x64: lower `struct` instantiations
2022-02-07 08:39:00 +01:00
joachimschmidt557
4468abfc42 stage2 ARM: enable a handful of passing behavior tests 2022-02-06 02:23:31 -05:00
Andrew Kelley
2c9a5e791b organize behavior tests
Every test that is moved in this commit has been checked to see if it is
now passing.
2022-01-26 00:36:12 -07:00
Andrew Kelley
f037029283 behavior tests: prevent disabled tests from lowering std.Target 2022-01-24 22:04:28 -07:00
Andrew Kelley
b34f994c0b stage2: type system treats fn ptr and body separately
This commit updates stage2 to enforce the property that the syntax
`fn()void` is a function *body* not a *pointer*. To get a pointer, the
syntax `*const fn()void` is required.

ZIR puts function alignment into the func instruction rather than the
decl because this way it makes it into function types. LLVM backend
respects function alignments.

Struct and Union have methods `fieldSrcLoc` to help look up source
locations of their fields. These trigger full loading, tokenization, and
parsing of source files, so should only be called once it is confirmed
that an error message needs to be printed.

There are some nice new error hints for explaining why a type is
required to be comptime, particularly for structs that contain function
body types.

`Type.requiresComptime` is now moved into Sema because it can fail and
might need to trigger field type resolution. Comptime pointer loading
takes into account types that do not have a well-defined memory layout
and does not try to compute a byte offset for them.

`fn()void` syntax no longer secretly makes a pointer. You get a function
body type, which requires comptime. However a pointer to a function body
can be runtime known (obviously).

Compile errors that report "expected pointer, found ..." are factored
out into convenience functions `checkPtrOperand` and `checkPtrType` and
have a note about function pointers.

Implemented `Value.hash` for functions, enum literals, and undefined values.

stage1 is not updated to this (yet?), so some workarounds and disabled
tests are needed to keep everything working. Should we update stage1 to
these new type semantics? Yes probably because I don't want to add too
much conditional compilation logic in the std lib for the different
backends.
2022-01-24 21:47:53 -07:00
Jimmi Holst Christensen
f1b91bb41b c backend: Implement aligning fields and local/global variables
There are some restrictions here.

- We either need C11 or a compiler that supports the aligned attribute
- We cannot provide align less than the type's natural C alignment.
2022-01-23 17:23:55 -05:00
Jakub Konka
df6c0067b2 stage2: fix passing arguments on the stack
* push the arguments in reverse order
* add logic for pushing args of any abi size to stack - very similar to
  `genSetStack` however, uses `.rsp` as the base register
* increment and decrement `.rsp` if we called a function with args on
  the stack in `airCall`
* add logic for recovering args from the caller's stack in the callee
2022-01-19 20:21:00 +01:00
Jakub Konka
ab204f81b0 stage2: return error.SkipZigTest in unsupported behavior tests 2022-01-17 20:30:44 +01:00
Jakub Konka
9b715cb462 stage2: implement airArrayToSlice for x86_64
* implement `genSetStack` for `ptr_stack_offset`
* handle `ptr_add`
* implement storing from register into pointer in register
* split alignment and array tests into those that pass on x86_64 and
  those that do not
* pass more tests on x86_64
2022-01-17 20:24:14 +01:00
Andrew Kelley
be5130ec53 compiler_rt: move more functions to the stage2 section
also move more already-passing behavior tests to the passing section.
2021-12-29 00:39:25 -07:00
Andrew Kelley
d97928bf52 stage2: implement aligned variables and @alignCast
* Sema: implement zirAllocExtended
 * Sema: implement zirAlignCast
2021-10-22 17:50:36 -07:00
Andrew Kelley
01c1f41520 stage2: slice and alignment fixes
* Fix backend using wrong union field of the slice instruction.
 * LLVM backend properly sets alignment on global variables.
 * Sema: add coercion for *T to *[1]T
 * Sema: pointers to Decls with explicit alignment now have alignment
   metadata in them.
2021-10-22 17:12:12 -07:00
Jacob G-W
9fffffb07b fix code broken from previous commit 2021-06-21 17:03:03 -07:00
Andrew Kelley
5619ce2406 Merge remote-tracking branch 'origin/master' into stage2-whole-file-astgen
Conflicts:
 * doc/langref.html.in
 * lib/std/enums.zig
 * lib/std/fmt.zig
 * lib/std/hash/auto_hash.zig
 * lib/std/math.zig
 * lib/std/mem.zig
 * lib/std/meta.zig
 * test/behavior/alignof.zig
 * test/behavior/bitcast.zig
 * test/behavior/bugs/1421.zig
 * test/behavior/cast.zig
 * test/behavior/ptrcast.zig
 * test/behavior/type_info.zig
 * test/behavior/vector.zig

Master branch added `try` to a bunch of testing function calls, and some
lines also had changed how to refer to the native architecture and other
`@import("builtin")` stuff.
2021-05-08 14:45:21 -07:00
Andrew Kelley
b6bb0ee1ac Merge remote-tracking branch 'origin/master' into stage2-whole-file-astgen
Conflicts:
 * lib/std/os/linux/tls.zig
 * test/behavior/align.zig
 * test/behavior/atomics.zig
 * test/behavior/vector.zig
2021-05-08 10:53:22 -07:00
Andrew Kelley
4307436b99 move behavior tests from test/stage1/ to test/
And fix test cases to make them pass. This is in preparation for
starting to pass behavior tests with self-hosted.
2021-04-29 15:54:04 -07:00
Renamed from test/stage1/behavior/align.zig (Browse further)