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7598 commits

Author SHA1 Message Date
David Rubin
8f84212855
riscv: make multi-threaded enabled compilation the default 2024-07-26 14:53:55 -07:00
David Rubin
846bd40361
riscv: implement @cmpxchg* and remove fixes 2024-07-26 12:43:47 -07:00
David Rubin
8da212c11b
riscv: update tests and fix reuse bug 2024-07-26 04:19:58 -07:00
David Rubin
a1f6a8ef90
riscv: airAsm rewrite 
with this rewrite we can call functions inside of
inline assembly, enabling us to use the default start.zig logic

all that's left is to implement lr/sc loops for atomically manipulating
1 and 2 byte values, after which we can use the segfault handler logic.
 2024-07-26 04:19:55 -07:00
David Rubin
b533e848a2
riscv: enable passing tests 2024-07-26 04:19:17 -07:00
David Rubin
c00a5ff792
riscv: implement @floatFromInt 2024-07-26 04:19:16 -07:00
David Rubin
1a7d89a84d
riscv: clean up and unify encoding logic 2024-07-26 04:19:13 -07:00
David Rubin
9bc7e8c852
riscv: update tests 2024-07-26 04:05:43 -07:00
David Rubin
1820f44104
riscv: implement sub-byte addition 2024-07-26 04:05:42 -07:00
David Rubin
81ca3a1d59
riscv: fix logic bug in ptr_elem_ptr 
I was doing duplicate work with `elemOffset` multiplying by the abi size and then the `ptr_add` `genBinOp` also multiplying.

This led to having writes happening in the wrong place.
 2024-07-26 04:05:41 -07:00
David Rubin
cde6956b21
riscv: remove redundant assert in genBinOp 2024-07-26 04:05:41 -07:00
David Rubin
93e9c7a963
riscv: implement @clz 2024-07-26 04:05:39 -07:00
David Rubin
8d30fc45c4
riscv: implement more operators 
we can run `std.debug.print` now, with both run-time strings and integers!
 2024-07-26 04:05:39 -07:00
David Rubin
9766b68c47
riscv: un-cache the avl and vtype when returning from a function call 
the csrs `avl` and `vtype` are considered caller-saved so it could have changed while inside of the function.
the easiest way to handle this is to just set the cached `vtype` and `avl` to null, so that the next time something
needs to set it, it'll emit an instruction instead of relying on a potentially invalid setting.
 2024-07-26 04:05:38 -07:00
Julian Vesper
3344ed8b8f aarch64: reenable tests that are no longer regressed 
Closes #12012
 2024-07-25 20:23:23 +03:00
Andrew Kelley
fa95c89a71
Merge pull request #20758 from pavelverigo/stage2-wasm-compiler-rt-test-pass 
stage2-wasm: pass compiler_rt test suite
 2024-07-23 20:42:25 -07:00
Pat Tullmann
e8503ecb65 Default std.posix.system.ucontext_t is void 
PR https://github.com/ziglang/zig/pull/20679 ("std.c reorganization")
switched feature-detection code to use "T != void" checks in place of
"@hasDecl".  However, the std.posix.system struct is empty, so
compile-time feature detection against symbols in there (specifically
`std.posix.system.ucontext_t` in this case), fail at compile time on
freestanding targets.

This PR adds a void ucontext_t into the std.posix.system default.

This PR also adds pseudo-"freestanding" variation of the StackIterator
"unwind" test.  It is sort of hacky (its freestanding, but assumes it can
invoke a Linux exit syscall), but it does detect this problem.

Fixes #20710
 2024-07-23 11:47:29 -07:00
Pavel Verigo
d71312d104 stage2-wasm: mul_sat 32 bits <=, i64, i128 2024-07-23 17:06:18 +02:00
David Rubin
1fc42ed3e7 riscv: disable failing test 2024-07-22 05:58:59 -04:00
Andrew Kelley
179a6e61e8
Merge pull request #20708 from alexrp/target-cleanup-2 
`std.Target`: Remove more dead architecture tags.
 2024-07-21 19:24:04 -07:00
Bogdan Romanyuk
42d9017feb
Sema: fix OOB access in coerceTupleToStruct (#19620) 
Co-authored-by: Veikka Tuominen <git@vexu.eu>
 2024-07-21 23:56:04 +00:00
Alex Rønne Petersen
c825b567b2
std.Target: Remove the r600 arch tag. 
These are quite old GPUs, and it is unlikely that Zig will ever be able to
target them.

See: https://en.wikipedia.org/wiki/Radeon_HD_2000_series
 2024-07-21 22:38:30 +02:00
David Rubin
08cddaf11c test: update make functions to use MakeOptions 2024-07-21 11:22:14 -07:00
Andrew Kelley
f303c3943f Revert "Merge pull request #20380 from tau-dev/master" 
This reverts commit 397be0c9cc, reversing
changes made to 18d412ab2f.

Caused test failures in master branch.
 2024-07-21 02:44:58 -07:00
Techatrix
c746d7a35d test: check output file caching of run steps with side-effects 2024-07-21 02:03:32 -07:00
Will Lillis
7e76818132
fix(fmt): pointer type syntax to index (take 2) (#20336) 
* Change main token for many-item and c style pointers from asterisk to l brace, update main token in c translation
 2024-07-21 01:55:52 -07:00
David Rubin
7591df5172 ip: use getExternFunc in getCoerced 
`ip.get` specifically doesn't allow `extern_func` keys to access it.
 2024-07-21 01:00:49 -07:00
Andrew Kelley
397be0c9cc
Merge pull request #20380 from tau-dev/master 
llvm: Nest debug info correctly
 2024-07-21 00:19:52 -07:00
WillLillis
18d412ab2f fix: remove misleading error note for failed array coercions 2024-07-21 00:10:36 -07:00
Will Lillis
9b292c0949
fix: Add error notes for method calls on double pointers (#20686) 2024-07-21 00:03:23 -07:00
Andrew Kelley
93c546c8c9
Merge pull request #20692 from pavelverigo/stage2-wasm-overflow-ops 
stage2-wasm: overflow ops improvement
 2024-07-20 23:57:14 -07:00
Pavel Verigo
a0795f11df disable failing tests on stage2 backends 2024-07-20 14:58:41 +02:00
Pavel Verigo
f5dd6fb71a stage2-wasm: @mulWithOverflow fixes + 128 bit signed 2024-07-20 13:21:46 +02:00
Andrew Kelley
9f112ce868 incr-test: running an update 2024-07-20 01:06:29 -07:00
Andrew Kelley
ea2c45227a init incremental compilation check tool 2024-07-20 01:06:29 -07:00
Tau
9c2d597e69 llvm: Fix debug gen for 0-bit types 
Add a regression test for that, since these weirdly never occur in any
of the other tests on x86-64-linux.
 2024-07-19 17:51:38 +02:00
Jacob Young
40bab4df69 behavior: disable test that triggers an llvm assertion 
Tracked by #20680
 2024-07-19 04:35:11 -04:00
Pavel Verigo
56d535dd24 stage2-wasm: improve @shlWithOverflow for <= 128 bits 
Additionally fixed a bug for shr on signed big ints
 2024-07-18 18:01:06 +02:00
Pavel Verigo
dc3176d628 stage2-wasm: enhance add/subWithOverflow 
Added behavior tests to verify implementation
 2024-07-18 17:54:44 +02:00
Pavel Verigo
d1bd9518f9 stage2-wasm: fix big int comparison 
Unexpected to be found only now
 2024-07-18 17:18:17 +02:00
Jakub Konka
34f34dbe32 macho: reinstate duplicate definition checking 2024-07-18 09:13:09 +02:00
Jakub Konka
e117e05768 macho: ensure we always name decls like LLVM to avoid confusion 2024-07-18 09:13:08 +02:00
Jakub Konka
91de8dc8ab macho: fix unresolved symbols error reporting 2024-07-18 09:13:08 +02:00
Jakub Konka
f9fbd6302f macho: test TLS in Zig with x86_64 backend 2024-07-18 09:13:08 +02:00
Jakub Konka
9d9b5a11e8
Merge pull request #20474 from Rexicon226/riscv 
more RISC-V backend progress
 2024-07-17 08:39:44 +02:00
Hayden Riddiford
20563d8457 - Added special handling for translating C extern variables declared within scoped blocks 
- Added test/cases/run_translated_c/extern_typedef_variables_in_functions.c to test for issue 19687
 2024-07-16 23:29:44 +03:00
Will Lillis
a9d544575d
Sema: add error note for failed coercions to optional types and error unions 2024-07-16 16:42:13 +00:00
Wooster
888708ec8a
Sema: support pointer subtraction 2024-07-15 18:18:38 +00:00
gooncreeper
c50f300387 Tokenizer bug fixes and improvements 
Fixes many error messages corresponding to invalid bytes displaying the
wrong byte. Additionaly improves handling of UTF-8 in some places.
 2024-07-15 11:31:19 +03:00
Andrew Kelley
9d38e82b5c
Merge pull request #20633 from ziglang/long-live-zig 
make zig compiler processes live across rebuilds
 2024-07-15 01:27:23 -07:00