Commit graph

96 commits

Author SHA1 Message Date
Bingwu Zhang
e8d6ecb9ce
riscv64: skip failing tests 2025-06-28 06:47:09 +08:00
Jacob Young
1f98c98fff x86_64: increase passing test coverage on windows
Now that codegen has no references to linker state this is much easier.

Closes #24153
2025-06-19 18:41:12 -04:00
Ali Cheraghi
872f68c9cb
rename spirv backend name
`stage2_spirv64` -> `stage2_spirv`
2025-06-16 13:22:19 +03:30
Jacob Young
80170d017b Legalize: handle packed semantics
Closes #22915
2025-06-03 15:04:43 -04:00
Jacob Young
b483defc5a Legalize: implement scalarization of binary operations 2025-05-31 18:54:28 -04:00
Pavel Verigo
33ad2c949e stage2-wasm: packed store/load 128 bits 2025-03-24 15:00:00 +01:00
Ali Cheraghi
54c097f50d spirv: packed struct init + field val access 2025-03-18 07:05:48 +03:30
Ali Cheraghi
aec0f9b3e7
test: skip failing tests with spirv-vulkan 2025-02-24 19:39:42 +01:00
Alex Rønne Petersen
2958a90515
test: Disable some vector behavior tests on aarch64_be.
See: https://github.com/ziglang/zig/issues/21893
2024-11-04 08:29:42 +01:00
Alex Rønne Petersen
354ea625e5
test: Re-enable "bitcast nan float does not modify signaling bit" for LLVM + arm.
This now passes on all targets that we test in CI.

See: https://github.com/ziglang/zig/issues/14366
2024-10-02 04:08:24 +02:00
Alex Rønne Petersen
bdae7d97b9 test: Disable @bitCast of packed struct containing pointer temporarily.
TODO: Figure out what to do about this.

Context: https://discourse.llvm.org/t/rfc-remove-most-constant-expressions/63179

After changing our emit strategy for packed structs to just write to memory:

test-behavior
└─ run test behavior-x86_64-linux.6.5...6.5-gnu.2.38-x86_64-ReleaseSmall-libc
   └─ zig test ReleaseSmall native failure
error: thread 44346 panic: attempt to unwrap error: ReinterpretDeclRef
/home/alexrp/Source/zig/src/Value.zig:571:42: 0x1f33514 in writeToPackedMemory (zig)
            if (!val.ptrHasIntAddr(mod)) return error.ReinterpretDeclRef;
                                         ^
/home/alexrp/Source/zig/src/Value.zig:548:17: 0x1f32f45 in writeToPackedMemory (zig)
                try field_val.writeToPackedMemory(field_ty, pt, buffer, bit_offset + bits);
                ^
/home/alexrp/Source/zig/src/codegen/llvm.zig:3706:89: 0x1ca2366 in lowerValueToInt (zig)
        val.writeToPackedMemory(ty, pt, std.mem.sliceAsBytes(limbs)[0..bytes], 0) catch unreachable;
                                                                                        ^
/home/alexrp/Source/zig/src/codegen/llvm.zig:4083:49: 0x1a33800 in lowerValue (zig)
                        return o.lowerValueToInt(llvm_int_ty, arg_val);
                                                ^
/home/alexrp/Source/zig/src/codegen/llvm.zig:4798:42: 0x2ec4e6a in resolveValue (zig)
        const llvm_val = try o.lowerValue(val.toIntern());
                                         ^
/home/alexrp/Source/zig/src/codegen/llvm.zig:4789:47: 0x2ec4bd3 in resolveInst (zig)
        const llvm_val = try self.resolveValue((try self.air.value(inst, self.ng.object.pt)).?);
                                              ^
/home/alexrp/Source/zig/src/codegen/llvm.zig:8996:49: 0x2f022e9 in airStore (zig)
        const src_operand = try self.resolveInst(bin_op.rhs);
                                                ^
/home/alexrp/Source/zig/src/codegen/llvm.zig:4967:53: 0x29f7260 in genBody (zig)
                .store          => try self.airStore(inst, false),
                                                    ^
/home/alexrp/Source/zig/src/codegen/llvm.zig:1682:19: 0x29f147c in updateFunc (zig)
        fg.genBody(air.getMainBody()) catch |err| switch (err) {
                  ^
/home/alexrp/Source/zig/src/link/Elf.zig:2916:70: 0x2eb0f15 in updateFunc (zig)
    if (self.llvm_object) |llvm_object| return llvm_object.updateFunc(pt, func_index, air, liveness);
                                                                     ^
/home/alexrp/Source/zig/src/link.zig:426:82: 0x29fbef5 in updateFunc (zig)
                return @as(*tag.Type(), @fieldParentPtr("base", base)).updateFunc(pt, func_index, air, liveness);
                                                                                 ^
/home/alexrp/Source/zig/src/Zcu/PerThread.zig:876:22: 0x25f3d9e in linkerUpdateFunc (zig)
        lf.updateFunc(pt, func_index, air, liveness) catch |err| switch (err) {
                     ^
/home/alexrp/Source/zig/src/Compilation.zig:3975:36: 0x21768fe in processOneCodegenJob (zig)
            try pt.linkerUpdateFunc(func.func, func.air);
                                   ^
/home/alexrp/Source/zig/src/Compilation.zig:3928:36: 0x2176541 in queueCodegenJob (zig)
        return processOneCodegenJob(tid, comp, codegen_job);
                                   ^
/home/alexrp/Source/zig/src/Compilation.zig:3682:37: 0x1e9d37f in processOneJob (zig)
            try comp.queueCodegenJob(tid, .{ .func = .{
                                    ^
/home/alexrp/Source/zig/src/Compilation.zig:3638:30: 0x1c1f6c1 in performAllTheWorkInner (zig)
            try processOneJob(@intFromEnum(Zcu.PerThread.Id.main), comp, job, main_progress_node);
                             ^
/home/alexrp/Source/zig/src/Compilation.zig:3508:36: 0x1ab6e10 in performAllTheWork (zig)
    try comp.performAllTheWorkInner(main_progress_node);
                                   ^
/home/alexrp/Source/zig/src/Compilation.zig:2269:31: 0x1ab25b9 in update (zig)
    try comp.performAllTheWork(main_progress_node);
                              ^
/home/alexrp/Source/zig/src/main.zig:4156:32: 0x1b01351 in serve (zig)
                try comp.update(main_progress_node);
                               ^
/home/alexrp/Source/zig/src/main.zig:3453:22: 0x1b20d7c in buildOutputType (zig)
            try serve(
                     ^
/home/alexrp/Source/zig/src/main.zig:267:31: 0x1969c54 in mainArgs (zig)
        return buildOutputType(gpa, arena, args, .zig_test);
                              ^
/home/alexrp/Source/zig/src/main.zig:199:20: 0x19669c5 in main (zig)
    return mainArgs(gpa, arena, args);
                   ^
/home/alexrp/Source/zig/lib/std/start.zig:614:37: 0x19664ee in main (zig)
            const result = root.main() catch |err| {
                                    ^
../sysdeps/nptl/libc_start_call_main.h:58:16: 0x7a453da2814f in __libc_start_call_main (../sysdeps/x86/libc-start.c)
../csu/libc-start.c:360:3: 0x7a453da28208 in __libc_start_main_impl (../sysdeps/x86/libc-start.c)
???:?:?: 0x1966134 in ??? (???)
???:?:?: 0x0 in ??? (???)
2024-09-19 18:20:21 -07:00
Alex Rønne Petersen
5cb9668632 test: Re-enable a bunch of behavior tests with LLVM.
Closes #10627.
Closes #12013.
Closes #18034.
2024-09-12 07:28:37 +02:00
mlugg
0fe3fd01dd
std: update std.builtin.Type fields to follow naming conventions
The compiler actually doesn't need any functional changes for this: Sema
does reification based on the tag indices of `std.builtin.Type` already!
So, no zig1.wasm update is necessary.

This change is necessary to disallow name clashes between fields and
decls on a type, which is a prerequisite of #9938.
2024-08-28 08:39:59 +01:00
David Rubin
b533e848a2
riscv: enable passing tests 2024-07-26 04:19:17 -07:00
David Rubin
7a02878f4e
riscv: truncate airStructFieldVal result 2024-07-14 23:02:33 -07:00
David Rubin
4fd8900337
riscv: rewrite "binOp"
Reorganize how the binOp and genBinOp functions work.

I've spent quite a while here reading exactly through the spec and so many
tests are enabled because of several critical issues the old design had.

There are some regressions that will take a long time to figure out individually
so I will ignore them for now, and pray they get fixed by themselves. When
we're closer to 100% passing is when I will start diving into them one-by-one.
2024-06-13 02:24:39 -07:00
David Rubin
083b7b483e
riscv: zero registers when using register-wide operations
what was happening is that instructions like `lb` were only affecting the lower bytes of the register and leaving the top dirty. this would lead to situtations were `cmp_eq` for example was using `xor`, which was failing because of the left-over stuff in the top of the register.

with this commit, we now zero out or truncate depending on the context, to ensure instructions like xor will provide proper results.
2024-06-13 02:22:04 -07:00
David Rubin
05de6c279b
riscv: std.fmt.format running
- implements `airSlice`, `airBitAnd`, `airBitOr`, `airShr`.

- got a basic design going for the `airErrorName` but for some reason it simply returns
empty bytes. will investigate further.

- only generating `.got.zig` entries when not compiling an object or shared library

- reduced the total amount of ops a mnemonic can have to 3, simplifying the logic
2024-06-13 02:20:47 -07:00
David Rubin
75372f12ef riscv: update behaviour tests again 2024-05-11 02:17:24 -07:00
David Rubin
ffb63a05a3 riscv: finally fix bug + airAggregateInit
i just hadn't realized that I placed the `riscv_start` branch in the non-simplified
starts
2024-05-11 02:17:24 -07:00
David Rubin
a30af172e8 riscv: math progress 2024-05-11 02:17:24 -07:00
David Rubin
d9e0cafe64 riscv: add stage2_riscv to test matrix and bypass failing tests 2024-05-11 02:17:24 -07:00
mlugg
d0e74ffe52
compiler: rework comptime pointer representation and access
We've got a big one here! This commit reworks how we represent pointers
in the InternPool, and rewrites the logic for loading and storing from
them at comptime.

Firstly, the pointer representation. Previously, pointers were
represented in a highly structured manner: pointers to fields, array
elements, etc, were explicitly represented. This works well for simple
cases, but is quite difficult to handle in the cases of unusual
reinterpretations, pointer casts, offsets, etc. Therefore, pointers are
now represented in a more "flat" manner. For types without well-defined
layouts -- such as comptime-only types, automatic-layout aggregates, and
so on -- we still use this "hierarchical" structure. However, for types
with well-defined layouts, we use a byte offset associated with the
pointer. This allows the comptime pointer access logic to deal with
reinterpreted pointers far more gracefully, because the "base address"
of a pointer -- for instance a `field` -- is a single value which
pointer accesses cannot exceed since the parent has undefined layout.
This strategy is also more useful to most backends -- see the updated
logic in `codegen.zig` and `codegen/llvm.zig`. For backends which do
prefer a chain of field and elements accesses for lowering pointer
values, such as SPIR-V, there is a helpful function in `Value` which
creates a strategy to derive a pointer value using ideally only field
and element accesses. This is actually more correct than the previous
logic, since it correctly handles pointer casts which, after the dust
has settled, end up referring exactly to an aggregate field or array
element.

In terms of the pointer access code, it has been rewritten from the
ground up. The old logic had become rather a mess of special cases being
added whenever bugs were hit, and was still riddled with bugs. The new
logic was written to handle the "difficult" cases correctly, the most
notable of which is restructuring of a comptime-only array (for
instance, converting a `[3][2]comptime_int` to a `[2][3]comptime_int`.
Currently, the logic for loading and storing work somewhat differently,
but a future change will likely improve the loading logic to bring it
more in line with the store strategy. As far as I can tell, the rewrite
has fixed all bugs exposed by #19414.

As a part of this, the comptime bitcast logic has also been rewritten.
Previously, bitcasts simply worked by serializing the entire value into
an in-memory buffer, then deserializing it. This strategy has two key
weaknesses: pointers, and undefined values. Representations of these
values at comptime cannot be easily serialized/deserialized whilst
preserving data, which means many bitcasts would become runtime-known if
pointers were involved, or would turn `undefined` values into `0xAA`.
The new logic works by "flattening" the datastructure to be cast into a
sequence of bit-packed atomic values, and then "unflattening" it; using
serialization when necessary, but with special handling for `undefined`
values and for pointers which align in virtual memory. The resulting
code is definitely slower -- more on this later -- but it is correct.

The pointer access and bitcast logic required some helper functions and
types which are not generally useful elsewhere, so I opted to split them
into separate files `Sema/comptime_ptr_access.zig` and
`Sema/bitcast.zig`, with simple re-exports in `Sema.zig` for their small
public APIs.

Whilst working on this branch, I caught various unrelated bugs with
transitive Sema errors, and with the handling of `undefined` values.
These bugs have been fixed, and corresponding behavior test added.

In terms of performance, I do anticipate that this commit will regress
performance somewhat, because the new pointer access and bitcast logic
is necessarily more complex. I have not yet taken performance
measurements, but will do shortly, and post the results in this PR. If
the performance regression is severe, I will do work to to optimize the
new logic before merge.

Resolves: #19452
Resolves: #19460
2024-04-17 13:41:25 +01:00
Andrew Kelley
3eb260f042 disable failing behavior test: "comptime bitcast with fields following f80"
see tracking issue #19387
2024-03-21 19:07:08 -07:00
Jacob Young
2fdc9e6ae8 x86_64: implement @shuffle 2024-02-25 11:22:10 +01:00
Jakub Konka
52066bf8e4 x86_64+macho: pass more behavior tests 2024-02-06 19:01:17 +01:00
dweiller
8108c9f4d2 test/behavior: replace all 'comptime expect' with 'comptime assert' 2024-01-15 20:55:01 +11:00
Jacob Young
014833b61f x86_64: implement more compliant vectors 2023-12-03 10:22:06 -05:00
Jacob Young
bf5ab54510 test: test with -fstrip and fix failures
Closes #17513
2023-12-01 04:34:50 +00:00
mlugg
9c16b2370d
test: update behavior to silence 'var is never mutated' errors 2023-11-19 09:57:03 +00:00
Andrew Kelley
3fc6fc6812 std.builtin.Endian: make the tags lower case
Let's take this breaking change opportunity to fix the style of this
enum.
2023-10-31 21:37:35 -04:00
Jacob Young
27fe945a00 Revert "Revert "Merge pull request #17637 from jacobly0/x86_64-test-std""
This reverts commit 6f0198cadb.
2023-10-22 15:46:43 -04:00
Andrew Kelley
6f0198cadb Revert "Merge pull request #17637 from jacobly0/x86_64-test-std"
This reverts commit 0c99ba1eab, reversing
changes made to 5f92b070bf.

This caused a CI failure when it landed in master branch due to a
128-bit `@byteSwap` in std.mem.
2023-10-22 12:16:35 -07:00
Jacob Young
2e6e39a700 x86_64: fix bugs and disable erroring tests 2023-10-21 10:55:41 -04:00
Robin Voetter
faad97edff
spirv: update failing / passing tests
Some tests are now failing due to debug info changes, some tests
now pass due to improved compiler functionality.
2023-10-15 20:08:18 +02:00
Jacob Young
54b2d6f072 x86_64: implement C abi for everything else 2023-10-05 04:38:25 -04:00
Jacob Young
cc6694a323 x86_64: implement C abi for f128 2023-10-05 04:10:38 -04:00
Jacob Young
8470652f10 x86_64: implement float compare and cast builtins 2023-10-01 15:09:52 -04:00
Robin Voetter
79f7481575 spirv: disable failing tests 2023-09-23 12:36:44 -07:00
Techatrix
ab970094ab wasm: enable successful behavior tests 2023-09-10 15:59:02 +02:00
mlugg
283afb50b5 AstGen: disallow '-0' integer literal
The intent here is ambiguous: this resolves to the comptime_int '0', but
it's likely the user meant to use a floating-point literal.

Resolves: #16890
2023-08-21 11:47:31 +03:00
Lewis Gaul
387b0ac4f1
Make NaNs quiet by default and other NaN tidy-up (#16826)
* Generalise NaN handling and make std.math.nan() give quiet NaNs

* Address uses of std.math.qnan_* and std.math.nan_* consts

* Comment out failing test due to issues with signalling NaN

* Fix issue in c_builtins.zig where we need qnan_u32
2023-08-18 02:07:49 -04:00
Jacob Young
228c956377 std: finish cleanup up asm
This also required implementing the necessary syntax in the x86_64 backend.
2023-07-31 03:49:21 -04:00
antlilja
a0ec2266fe Update tests to new splat syntax 2023-07-12 15:35:57 -07:00
r00ster91
2583a39fb6 behavior: test @bitCast of packed struct of bools
This seems to have resolved itself now.
Tested on x86_64 using debug optimize mode.

Closes #9851
2023-07-03 10:59:13 -07:00
mlugg
f26dda2117 all: migrate code to new cast builtin syntax
Most of this migration was performed automatically with `zig fmt`. There
were a few exceptions which I had to manually fix:

* `@alignCast` and `@addrSpaceCast` cannot be automatically rewritten
* `@truncate`'s fixup is incorrect for vectors
* Test cases are not formatted, and their error locations change
2023-06-24 16:56:39 -07:00
Eric Joldasov
d884d7050e
all: replace comptime try with try comptime
Signed-off-by: Eric Joldasov <bratishkaerik@getgoogleoff.me>
2023-06-13 23:46:58 +06:00
Robin Voetter
37aa343079
spirv: more passing tests 2023-05-20 17:30:22 +02:00
Jacob Young
729daed591 x86_64: rewrite casts 2023-05-18 20:42:38 -04:00
Ali Chraghi
ccc490ef68
setup spirv backend in behavior tests 2023-05-11 20:31:52 +02:00