Commit graph

242 commits

Author SHA1 Message Date
Matthew Lugg
032bbd68a7
Merge pull request #24537 from IOKG04/some-documentation-updates-0
some small langref changes
2025-07-31 02:32:32 +01:00
Jacob Young
3fbdd58a87 aarch64: implement scalar @mod 2025-07-28 22:23:19 -07:00
Rue
5381e7891d
Merge branch 'ziglang:master' into some-documentation-updates-0 2025-07-28 14:54:52 +02:00
Jacob Young
5060ab99c9 aarch64: add new from scratch self-hosted backend 2025-07-22 19:43:47 -07:00
IOKG04
84ae54fbe6 @rem() and @mod() take denominator != 0, not just denominator > 0
https://github.com/ziglang/zig/issues/23635

I also added tests for `@rem()` with `denominator < 0` cause there were none before
I hope I added them in the correct place, if not I can change it ofc
2025-07-22 13:35:55 +02:00
Bingwu Zhang
e8d6ecb9ce
riscv64: skip failing tests 2025-06-28 06:47:09 +08:00
Jacob Young
1f98c98fff x86_64: increase passing test coverage on windows
Now that codegen has no references to linker state this is much easier.

Closes #24153
2025-06-19 18:41:12 -04:00
Ali Cheraghi
872f68c9cb
rename spirv backend name
`stage2_spirv64` -> `stage2_spirv`
2025-06-16 13:22:19 +03:30
Jacob Young
5986bdf868 Compilation: enable the x86_64 backend by default for debug builds
Closes #22257
2025-06-06 23:42:14 -07:00
Alex Rønne Petersen
9d534790eb std.Target: Introduce Cpu convenience functions for feature tests.
Before:

* std.Target.arm.featureSetHas(target.cpu.features, .has_v7)
* std.Target.x86.featureSetHasAny(target.cpu.features, .{ .sse, .avx, .cmov })
* std.Target.wasm.featureSetHasAll(target.cpu.features, .{ .atomics, .bulk_memory })

After:

* target.cpu.has(.arm, .has_v7)
* target.cpu.hasAny(.x86, &.{ .sse, .avx, .cmov })
* target.cpu.hasAll(.wasm, &.{ .atomics, .bulk_memory })
2025-06-05 06:12:00 +02:00
Jacob Young
2543e2d97c x86_64: implement integer @divFloor and @mod
Closes #24039
2025-06-02 22:45:15 -04:00
Jacob Young
9edfccb9a7
Legalize: implement scalarization of overflow intrinsics 2025-06-01 08:24:01 +01:00
Jacob Young
b483defc5a Legalize: implement scalarization of binary operations 2025-05-31 18:54:28 -04:00
Jacob Young
c1e9ef9eaa Legalize: implement scalarization of unary operations 2025-05-31 18:54:28 -04:00
Andrew Kelley
65bd8d52c8
Merge pull request #23061 from pavelverigo/stage2-wasm-misc
stage2-wasm: multiple fixes
2025-04-11 15:56:35 -04:00
Jacob Young
c82e1fe880
Merge pull request #23355 from jacobly0/x86_64-rewrite
x86_64: start rewriting overflow operations
2025-04-11 05:21:44 -04:00
Alex Rønne Petersen
382aa48f04
test: Disable a bunch of vector behavior tests for hexagon.
Most of the failures are:

* https://github.com/llvm/llvm-project/issues/118879
* https://github.com/llvm/llvm-project/issues/134659

But some are also miscompilations leading to wrong results. I'm not going to
investigate the latter further until all the backend crashes have been resolved.
2025-04-11 02:28:35 +02:00
Jacob Young
bc10131db1 x86_64: rewrite scalar @mulWithOverflow
Closes #19607
2025-04-09 20:14:12 -04:00
Pavel Verigo
15bc2ab0a8 stage2-wasm: clz fix 2025-03-24 15:00:00 +01:00
mlugg
2a4e06bcb3 Sema: rewrite comptime arithmetic
This commit reworks how Sema handles arithmetic on comptime-known
values, fixing many bugs in the process.

The general pattern is that arithmetic on comptime-known values is now
handled by the new namespace `Sema.arith`. Functions handling comptime
arithmetic no longer live on `Value`; this is because some of them can
emit compile errors, so some *can't* go on `Value`. Only semantic
analysis should really be doing arithmetic on `Value`s anyway, so it
makes sense for it to integrate more tightly with `Sema`.

This commit also implements more coherent rules surrounding how
`undefined` interacts with comptime and mixed-comptime-runtime
arithmetic. The rules are as follows.

* If an operation cannot trigger Illegal Behavior, and any operand is
  `undefined`, the result is `undefined`. This includes operations like
  `0 *| undef`, where the LHS logically *could* be used to determine a
  defined result. This is partly to simplify the language, but mostly to
  permit codegen backends to represent `undefined` values as completely
  invalid states.

* If an operation *can* trigger Illegal Behvaior, and any operand is
  `undefined`, then Illegal Behavior results. This occurs even if the
  operand in question isn't the one that "decides" illegal behavior; for
  instance, `undef / 1` is undefined. This is for the same reasons as
  described above.

* An operation which would trigger Illegal Behavior, when evaluated at
  comptime, instead triggers a compile error. Additionally, if one
  operand is comptime-known undef, such that the other (runtime-known)
  operand isn't needed to determine that Illegal Behavior would occur,
  the compile error is triggered.

* The only situation in which an operation with one comptime-known
  operand has a comptime-known result is if that operand is undefined,
  in which case the result is either undefined or a compile error per
  the above rules. This could potentially be loosened in future (for
  instance, `0 * rt` could be comptime-known 0 with a runtime assertion
  that `rt` is not undefined), but at least for now, defining it more
  conservatively simplifies the language and allows us to easily change
  this in future if desired.

This commit fixes many bugs regarding the handling of `undefined`,
particularly in vectors. Along with a collection of smaller tests, two
very large test cases are added to check arithmetic on `undefined`.

The operations which have been rewritten in this PR are:

* `+`, `+%`, `+|`, `@addWithOverflow`
* `-`, `-%`, `-|`, `@subWithOverflow`
* `*`, `*%`, `*|`, `@mulWithOverflow`
* `/`, `@divFloor`, `@divTrunc`, `@divExact`
* `%`, `@rem`, `@mod`

Other arithmetic operations are currently unchanged.

Resolves: #22743
Resolves: #22745
Resolves: #22748
Resolves: #22749
Resolves: #22914
2025-03-16 08:17:50 +00:00
Ali Cheraghi
aec0f9b3e7
test: skip failing tests with spirv-vulkan 2025-02-24 19:39:42 +01:00
Alex Rønne Petersen
481b7bf3f0
std.Target: Remove functions that just wrap component functions.
Functions like isMinGW() and isGnuLibC() have a good reason to exist: They look
at multiple components of the target. But functions like isWasm(), isDarwin(),
isGnu(), etc only exist to save 4-8 characters. I don't think this is a good
enough reason to keep them, especially given that:

* It's not immediately obvious to a reader whether target.isDarwin() means the
  same thing as target.os.tag.isDarwin() precisely because isMinGW() and similar
  functions *do* look at multiple components.
* It's not clear where we would draw the line. The logical conclusion before
  this commit would be to also wrap Arch.isX86(), Os.Tag.isSolarish(),
  Abi.isOpenHarmony(), etc... this obviously quickly gets out of hand.
* It's nice to just have a single correct way of doing something.
2025-02-17 19:18:19 +01:00
Jacob Young
f6bcc9dbcb x86_64: rewrite scalar and vector int @rem 2025-02-15 03:45:21 -05:00
Jacob Young
5433e0438c cbe: fix ub triggered by mulw overflowing the promoted type
Closes #21914
2025-02-10 17:22:16 -08:00
Jacob Young
c3d33440f0 x86_64: pass more behavior tests 2025-01-16 20:47:30 -05:00
Jacob Young
e5d5a8bc4e x86_64: implement switch jump tables 2025-01-16 20:42:08 -05:00
Jacob Young
ac1a975f9b x86_64: implement clz and not 2025-01-16 20:42:08 -05:00
Alex Rønne Petersen
c9e67e71c1
std.Target: Replace isARM() with isArmOrThumb() and rename it to isArm().
The old isARM() function was a portability trap. With the name it had, it seemed
like the obviously correct function to use, but it didn't include Thumb. In the
vast majority of cases where someone wants to ask "is the target Arm?", Thumb
*should* be included.

There are exactly 3 cases in the codebase where we do actually need to exclude
Thumb, although one of those is in Aro and mirrors a check in Clang that is
itself likely a bug. These rare cases can just add an extra isThumb() check.
2024-11-03 09:29:30 +01:00
Robin Voetter
86b88ea7da
spirv: skip range switch tests
This is not yet implemented
2024-10-13 01:58:11 +02:00
Pavel Verigo
4b89a4c7cb stage2-wasm: airRem + airMod for floats 2024-10-08 20:58:15 +02:00
mlugg
4650e5b9fc
Sema: clean up cmpNumeric
There is one minor language change here, which is that comparisons of
the form `comptime_inf < runtime_f32` have their results comptime-known.
This is consistent with comparisons against comptime NaN for instance,
which are always comptime known. A corresponding behavior test is added.

This fixes a bug with int comparison elision which my previous commit
somehow triggered. `Sema.compareIntsOnlyPossibleResult` is much cleaner
now!
2024-09-17 11:00:38 +01:00
Alex Rønne Petersen
5cb9668632 test: Re-enable a bunch of behavior tests with LLVM.
Closes #10627.
Closes #12013.
Closes #18034.
2024-09-12 07:28:37 +02:00
Alex Rønne Petersen
26119bd98d
test: Skip some floating point tests that fail on arm-linux-(gnu,musl)eabi.
https://github.com/ziglang/zig/issues/21234
2024-09-10 08:53:30 +02:00
mlugg
0fe3fd01dd
std: update std.builtin.Type fields to follow naming conventions
The compiler actually doesn't need any functional changes for this: Sema
does reification based on the tag indices of `std.builtin.Type` already!
So, no zig1.wasm update is necessary.

This change is necessary to disallow name clashes between fields and
decls on a type, which is a prerequisite of #9938.
2024-08-28 08:39:59 +01:00
David Rubin
b533e848a2
riscv: enable passing tests 2024-07-26 04:19:17 -07:00
David Rubin
93e9c7a963
riscv: implement @clz 2024-07-26 04:05:39 -07:00
David Rubin
8d30fc45c4
riscv: implement more operators
we can run `std.debug.print` now, with both run-time strings and integers!
2024-07-26 04:05:39 -07:00
Pavel Verigo
a0795f11df disable failing tests on stage2 backends 2024-07-20 14:58:41 +02:00
Pavel Verigo
f5dd6fb71a stage2-wasm: @mulWithOverflow fixes + 128 bit signed 2024-07-20 13:21:46 +02:00
Pavel Verigo
56d535dd24 stage2-wasm: improve @shlWithOverflow for <= 128 bits
Additionally fixed a bug for shr on signed big ints
2024-07-18 18:01:06 +02:00
Pavel Verigo
dc3176d628 stage2-wasm: enhance add/subWithOverflow
Added behavior tests to verify implementation
2024-07-18 17:54:44 +02:00
David Rubin
7a02878f4e
riscv: truncate airStructFieldVal result 2024-07-14 23:02:33 -07:00
Pavel Verigo
1a951b49af stage2-wasm: not op for <= 128 bits ints 2024-07-02 15:02:59 +02:00
Pavel Verigo
6026bbd0ad stage2-wasm: fix div and rem 2024-06-22 21:35:36 +02:00
David Rubin
4fd8900337
riscv: rewrite "binOp"
Reorganize how the binOp and genBinOp functions work.

I've spent quite a while here reading exactly through the spec and so many
tests are enabled because of several critical issues the old design had.

There are some regressions that will take a long time to figure out individually
so I will ignore them for now, and pray they get fixed by themselves. When
we're closer to 100% passing is when I will start diving into them one-by-one.
2024-06-13 02:24:39 -07:00
David Rubin
d69c48370a
riscv: integer + float @abs 2024-06-13 02:22:06 -07:00
David Rubin
c10d1c6a75
riscv: implement more arithmetic instructions 2024-06-13 02:22:05 -07:00
David Rubin
083b7b483e
riscv: zero registers when using register-wide operations
what was happening is that instructions like `lb` were only affecting the lower bytes of the register and leaving the top dirty. this would lead to situtations were `cmp_eq` for example was using `xor`, which was failing because of the left-over stuff in the top of the register.

with this commit, we now zero out or truncate depending on the context, to ensure instructions like xor will provide proper results.
2024-06-13 02:22:04 -07:00
David Rubin
05de6c279b
riscv: std.fmt.format running
- implements `airSlice`, `airBitAnd`, `airBitOr`, `airShr`.

- got a basic design going for the `airErrorName` but for some reason it simply returns
empty bytes. will investigate further.

- only generating `.got.zig` entries when not compiling an object or shared library

- reduced the total amount of ops a mnemonic can have to 3, simplifying the logic
2024-06-13 02:20:47 -07:00
Robin Voetter
a3b1ba82f5
spirv: new vectorization helper
The old vectorization helper (WipElementWise) was clunky and a bit
annoying to use, and it wasn't really flexible enough.

This introduces a new vectorization helper, which uses Temporary and
Operation types to deduce a Vectorization to perform the operation
in a reasonably efficient manner. It removes the outer loop
required by WipElementWise so that implementations of AIR instructions
are cleaner. This helps with sanity when we start to introduce support
for composite integers.

airShift, convertToDirect, convertToIndirect, and normalize are initially
implemented using this new method.
2024-06-10 20:32:49 +02:00