Commit graph

25 commits

Author SHA1 Message Date
Alex Rønne Petersen
5d019abe4e start adding big endian RISC-V support
The big endian RISC-V effort is mostly driven by MIPS (the company) which is
pivoting to RISC-V, and presumably needs a big endian variant to fill the niche
that big endian MIPS (the ISA) did.

GCC already supports these targets, but LLVM support will only appear in 22;
this commit just adds the necessary target knowledge and checks on our end.
2025-08-25 16:15:17 +02:00
Jacob Young
5060ab99c9 aarch64: add new from scratch self-hosted backend 2025-07-22 19:43:47 -07:00
Andrew Kelley
8a19eeb8af canonicalize loongarch clobbers 2025-07-16 10:27:40 -07:00
Andrew Kelley
15e5e5b2bc fix mips inline asm
wtf are these dollar signs?
2025-07-16 10:27:40 -07:00
Andrew Kelley
76d04c1662 zig fmt 2025-07-16 10:27:39 -07:00
Alex Rønne Petersen
9a1e754a58 compiler-rt: Implement __clear_cache() for mips-netbsd 2025-07-07 09:05:07 +02:00
Alex Rønne Petersen
bc8ace2a6d compiler-rt: Issue VALGRIND_DISCARD_TRANSLATIONS request in __clear_cache().
Closes #24030.
2025-06-04 13:25:21 +02:00
Alex Rønne Petersen
90fb2d9754
compiler-rt: Fix some exports to respect the common linkage and visibility. 2025-05-19 00:22:03 +02:00
Linus Groh
79460d4a3e Remove uses of deprecated callconv aliases 2025-03-05 03:01:43 +00:00
Alex Rønne Petersen
dd983e12aa
compiler-rt: Use loongarch clear_cache() implementation for loongarch32 too. 2024-10-16 01:10:35 +02:00
mlugg
a3a737e9a6
lib,test,tools,doc: update usages of @export 2024-08-27 00:44:35 +01:00
YANG Xudong
6d54f20c47
loongarch: add __clear_cache builtin implementation (#21008) 2024-08-10 01:24:01 -07:00
Alex Rønne Petersen
c8ca05e93a
std.Target: Remove sparcel architecture tag.
What is `sparcel`, you might ask? Good question!

If you take a peek in the SPARC v8 manual, §2.2, it is quite explicit that SPARC
v8 is a big-endian architecture. No little-endian or mixed-endian support to be
found here.

On the other hand, the SPARC v9 manual, in §3.2.1.2, states that it has support
for mixed-endian operation, with big-endian mode being the default.

Ok, so `sparcel` must just be referring to SPARC v9 running in little-endian
mode, surely?

Nope:

* 40b4fd7a3e/llvm/lib/Target/Sparc/SparcTargetMachine.cpp (L226)
* 40b4fd7a3e/llvm/lib/Target/Sparc/SparcTargetMachine.cpp (L104)

So, `sparcel` in LLVM is referring to some sort of fantastical little-endian
SPARC v8 architecture. I've scoured the internet and I can find absolutely no
evidence that such a thing exists or has ever existed. In fact, I can find no
evidence that a little-endian implementation of SPARC v9 ever existed, either.
Or any SPARC version, actually!

The support was added here: https://reviews.llvm.org/D8741

Notably, there is no mention whatsoever of what CPU this might be referring to,
and no justification given for the "but some are little" comment added in the
patch.

My best guess is that this might have been some private exercise in creating a
little-endian version of SPARC that never saw the light of day. Given that SPARC
v8 explicitly doesn't support little-endian operation (let alone little-endian
instruction encoding!), and no CPU is known to be implemented as such, I think
it's very reasonable for us to just remove this support.
2024-07-30 06:30:25 +02:00
Alex Rønne Petersen
d1d95294fd std.Target.Cpu.Arch: Remove the aarch64_32 tag.
This is a misfeature that we inherited from LLVM:

* https://reviews.llvm.org/D61259
* https://reviews.llvm.org/D61939

(`aarch64_32` and `arm64_32` are equivalent.)

I truly have no idea why this triple passed review in LLVM. It is, to date, the
*only* tag in the architecture component that is not, in fact, an architecture.
In reality, it is just an ILP32 ABI for AArch64 (*not* AArch32).

The triples that use `aarch64_32` look like `aarch64_32-apple-watchos`. Yes,
that triple is exactly what you think; it has no ABI component. They really,
seriously did this.

Since only Apple could come up with silliness like this, it should come as no
surprise that no one else uses `aarch64_32`. Later on, a GNU ILP32 ABI for
AArch64 was developed, and support was added to LLVM:

* https://reviews.llvm.org/D94143
* https://reviews.llvm.org/D104931

Here, sanity seems to have prevailed, and a triple using this ABI looks like
`aarch64-linux-gnu_ilp32` as you would expect.

As can be seen from the diffs in this commit, there was plenty of confusion
throughout the Zig codebase about what exactly `aarch64_32` was. So let's just
remove it. In its place, we'll use `aarch64-watchos-ilp32`,
`aarch64-linux-gnuilp32`, and so on. We'll then translate these appropriately
when talking to LLVM. Hence, this commit adds the `ilp32` ABI tag (we already
have `gnuilp32`).
2024-07-28 19:44:52 -07:00
Jakub Konka
2e1fc0dd14 handle visionos target OS tag in the compiler
* rename .xros to .visionos as agreed in the tracking issue
* add support for VisionOS platform in the MachO linker
2024-05-09 15:04:15 +02:00
Tristan Ross
c260b4c753
std.builtin: make global linkage fields lowercase 2024-03-11 07:09:10 -07:00
Jacob Young
17e3fcc3a5 compiler_rt: fight off @as invasion
Importantly, fixes incorrectly annotated types in `__aeabi_?2h`.
2023-09-19 09:37:52 -07:00
mlugg
f26dda2117 all: migrate code to new cast builtin syntax
Most of this migration was performed automatically with `zig fmt`. There
were a few exceptions which I had to manually fix:

* `@alignCast` and `@addrSpaceCast` cannot be automatically rewritten
* `@truncate`'s fixup is incorrect for vectors
* Test cases are not formatted, and their error locations change
2023-06-24 16:56:39 -07:00
Eric Joldasov
50339f595a all: zig fmt and rename "@XToY" to "@YFromX"
Signed-off-by: Eric Joldasov <bratishkaerik@getgoogleoff.me>
2023-06-19 12:34:42 -07:00
mlugg
4976b58ab1
Prevent analysis of functions only referenced at comptime
The idea here is that there are two ways we can reference a function at runtime:

* Through a direct call, i.e. where the function is comptime-known
* Through a function pointer

This means we can easily perform a form of rudimentary escape analysis
on functions. If we ever see a `decl_ref` or `ref` of a function, we
have a function pointer, which could "leak" into runtime code, so we
emit the function; but for a plain `decl_val`, there's no need to.

This change means that `comptime { _ = f; }` no longer forces a function
to be emitted, which was used for some things (mainly tests). These use
sites have been replaced with `_ = &f;`, which still triggers analysis
of the function body, since you're taking a pointer to the function.

Resolves: #6256
Resolves: #15353
2023-05-29 23:06:08 +01:00
Ali Chraghi
f5f1f8c666 all: rename i386 to x86 2022-11-04 00:09:27 +03:30
Andrew Kelley
8e492f7d47 compiler_rt: enable __clear_cache for stage2 2022-07-07 20:47:43 -07:00
Jakub Konka
80790be309 compiler_rt: compile each unit separately for improved archiving 2022-06-17 16:38:59 -07:00
Koakuma
fb0692334e target: Rename sparcv9 -> sparc64
Rename all references of sparcv9 to sparc64, to make Zig align more with
other projects. Also, added new function to convert glibc arch name to Zig
arch name, since it refers to the architecture as sparcv9.

This is based on the suggestion by @kubkon in PR 11847.
(https://github.com/ziglang/zig/pull/11487#pullrequestreview-963761757)
2022-05-13 16:43:59 -04:00
Andrew Kelley
ec95e00e28 flatten lib/std/special and improve "pkg inside another" logic
stage2: change logic for detecting whether the main package is inside
the std package. Previously it relied on realpath() which is not portable.
This uses resolve() which is how imports already work.

 * stage2: fix cleanup bug when creating Module
 * flatten lib/std/special/* to lib/*
   - this was motivated by making main_pkg_is_inside_std false for
     compiler_rt & friends.
 * rename "mini libc" to "universal libc"
2022-05-06 22:41:00 -07:00
Renamed from lib/std/special/compiler_rt/clear_cache.zig (Browse further)