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4 commits

Author SHA1 Message Date
David Rubin
d9e0cafe64 riscv: add stage2_riscv to test matrix and bypass failing tests 2024-05-11 02:17:24 -07:00
Dominic
1550b5b16d
astgen: fix result info for catch switch_block_err_union 2024-05-11 12:06:13 +03:00
Robin Voetter
9fbba0e01a
spirv: update tests 2024-02-04 19:09:33 +01:00
dweiller
69ab687156 test: add tests for switch_block_err_union 2024-01-09 14:42:12 +11:00