Jacob Young
7894703ee7
aarch64: implement more optional/error union/union support
2025-07-26 21:39:50 -04:00
Jacob Young
7c349da49c
aarch64: implement complex switch prongs
2025-07-26 16:08:40 -04:00
Jacob Young
5060ab99c9
aarch64: add new from scratch self-hosted backend
2025-07-22 19:43:47 -07:00
Ali Cheraghi
872f68c9cb
rename spirv backend name
...
`stage2_spirv64` -> `stage2_spirv`
2025-06-16 13:22:19 +03:30
Robin Voetter
86b88ea7da
spirv: skip range switch tests
...
This is not yet implemented
2024-10-13 01:58:11 +02:00
David Rubin
7a02878f4e
riscv: truncate airStructFieldVal result
2024-07-14 23:02:33 -07:00
David Rubin
4fd8900337
riscv: rewrite "binOp"
...
Reorganize how the binOp and genBinOp functions work.
I've spent quite a while here reading exactly through the spec and so many
tests are enabled because of several critical issues the old design had.
There are some regressions that will take a long time to figure out individually
so I will ignore them for now, and pray they get fixed by themselves. When
we're closer to 100% passing is when I will start diving into them one-by-one.
2024-06-13 02:24:39 -07:00
David Rubin
05de6c279b
riscv: std.fmt.format running
...
- implements `airSlice`, `airBitAnd`, `airBitOr`, `airShr`.
- got a basic design going for the `airErrorName` but for some reason it simply returns
empty bytes. will investigate further.
- only generating `.got.zig` entries when not compiling an object or shared library
- reduced the total amount of ops a mnemonic can have to 3, simplifying the logic
2024-06-13 02:20:47 -07:00
David Rubin
004d0c8978
riscv: switch progress + by-ref return progress
2024-06-13 02:19:38 -07:00
David Rubin
d9e0cafe64
riscv: add stage2_riscv to test matrix and bypass failing tests
2024-05-11 02:17:24 -07:00
mlugg
9c16b2370d
test: update behavior to silence 'var is never mutated' errors
2023-11-19 09:57:03 +00:00
Ali Chraghi
e5d5c1d423
spirv: switch on bool
2023-10-18 02:31:16 +03:30
Robin Voetter
faad97edff
spirv: update failing / passing tests
...
Some tests are now failing due to debug info changes, some tests
now pass due to improved compiler functionality.
2023-10-15 20:08:18 +02:00
Robin Voetter
075584a4d7
spirv: enable passing tests
2023-09-23 12:36:56 -07:00
Eric Joldasov
50339f595a
all: zig fmt and rename "@XToY" to "@YFromX"
...
Signed-off-by: Eric Joldasov <bratishkaerik@getgoogleoff.me>
2023-06-19 12:34:42 -07:00
Ali Chraghi
ccc490ef68
setup spirv backend in behavior tests
2023-05-11 20:31:52 +02:00
Jacob Young
db88b41472
x86_64: fix switch multi-prongs and mul/div flags clobber
2023-05-01 19:22:53 -04:00
Jacob Young
05b12e6779
x86_64: handle duplicate prong deaths
2023-03-15 01:04:21 -04:00
Koakuma
f9e9ba784f
stage2: sparc64: Skip unimplemented tests
2022-12-10 21:51:46 +07:00
Veikka Tuominen
b5c0a797a7
Sema: inline switch capture needs to be set when switch operand is comptime known
2022-10-08 16:58:52 +03:00
Veikka Tuominen
83fa216c8d
Sema: implement inline else for ints
2022-09-27 18:33:23 +03:00
Veikka Tuominen
950a0e2405
Sema: implement inline else for errors enums and bools
2022-09-27 18:33:23 +03:00
Veikka Tuominen
0e77259f44
add inline switch union tag captures
2022-09-27 18:33:23 +03:00
Veikka Tuominen
5baaf90e3c
Sema: implement non-special inline switch prongs
2022-09-27 18:33:23 +03:00
