Commit graph

890 commits

Author SHA1 Message Date
Vexu
7b68385d7d self-hosted: astGenIntegerLiteral support other bases 2020-06-22 23:19:12 -04:00
Vexu
d98aed6eff self-hosted: generalize astGenBuiltinCall 2020-06-22 23:19:12 -04:00
Andrew Kelley
c9a0ec25e0 self-hosted: add Tracy integration
This tool helps give an intuitive picture of performance. This will help
us understand where to improve the code.
2020-06-18 21:55:37 -04:00
Andrew Kelley
7e44302260 stage2: explicit hash and equality function for the DeclTable 2020-06-18 17:12:56 -04:00
Andrew Kelley
02f688d710 remove std.debug.warn debugging logs 2020-06-18 17:12:56 -04:00
Andrew Kelley
7e58c56ca7 self-hosted: implement Decl lookup
* Take advantage of coercing anonymous struct literals to struct types.
 * Reworks Module to favor Zig source as the primary use case.
   Breaks ZIR compilation, which will have to be restored in a future commit.
 * Decl uses src_index rather then src, pointing to an AST Decl node
   index, or ZIR Module Decl index, rather than a byte offset.
 * ZIR instructions have an `analyzed_inst` field instead of Module
   having a hash table.
 * Module.Fn loses the `fn_type` field since it is redundant with
   its `owner_decl` `TypedValue` type.
 * Implement Type and Value copying. A ZIR Const instruction's TypedValue
   is copied to the Decl arena during analysis, which allows freeing the
   ZIR text instructions post-analysis.
 * Don't flush the ELF file if there are compilation errors.
 * Function return types allow arbitrarily complex expressions.
 * AST->ZIR for function calls and return statements.
2020-06-18 17:12:56 -04:00
Andrew Kelley
b4eac0414a stage2: hook up Zig AST to ZIR
* Introduce the concept of anonymous Decls
 * Primitive Hello, World with inline asm works
 * There is still an unsolved problem of how to manage ZIR instructions
   memory when generating from AST. Currently it leaks.
2020-06-18 17:12:56 -04:00
Noam Preil
a99e61ebaa
Stage2/Testing: Code cleanup 2020-06-15 21:47:42 -04:00
Noam Preil
afec3e72f4
Stage2/Testing: Enable another test 2020-06-15 20:42:22 -04:00
Noam Preil
7d1c9a69cc
Stage2/Testing: Remove dead code 2020-06-15 20:33:43 -04:00
Noam Preil
adb21f1caf
Stage2/Testing: Add error tests to ZIRCase 2020-06-15 20:33:43 -04:00
Noam Preil
7ee0462f5f
Stage2/Testing: Fix transformation tests 2020-06-15 20:33:39 -04:00
Noam Preil
1e5945d0a9
Stage2/Testing: remove ZIRTransformCase 2020-06-15 20:33:39 -04:00
Noam Preil
71dca252a5
Stage2/Testing: Rename stage -> update 2020-06-15 20:33:32 -04:00
Noam Preil
b6bd51ed69
Stage2/Testing: Move Transformation case to ZIRCase 2020-06-15 20:33:25 -04:00
Noam Preil
e77fc7fe7e
Stage2/Testing: Fix error specification 2020-06-15 20:33:17 -04:00
Noam Preil
6dce317fe3
Stage2/Testing: Fix error tests 2020-06-15 20:33:07 -04:00
Noam Preil
d4fd7c6a01
Stage2/Testing: Staged test harness draft design 2020-06-15 20:32:54 -04:00
Noam Preil
bf8b3a4394
[Stage2/Testing] Handle decl and export errors 2020-06-15 17:51:43 -04:00
Noam Preil
68cc068a3a
[Stage2/Testing] Make API more friendly 2020-06-15 17:51:43 -04:00
Noam Preil
e030414c16
[Stage2/Testing] Always finish case, note all errs 2020-06-15 17:51:43 -04:00
Noam Preil
f2399db3ef
[Stage2/Testing] Don't rely on update erroring 2020-06-15 17:51:42 -04:00
Noam Preil
67414be86b
[Stage2/Testing] Print name of failed test 2020-06-15 17:51:42 -04:00
Noam Preil
c92816fbef
[Stage2/Testing] ZIR tests for expected errors 2020-06-15 17:51:29 -04:00
Andrew Kelley
47090d234e stage2: add passing test for compile error in unreferenced cycle 2020-06-08 15:16:40 -04:00
Andrew Kelley
9ea4965ceb self-hosted: remove deleted Decls from failed_decls 2020-06-08 15:16:40 -04:00
Andrew Kelley
91930a4ff0 stage2: fix not re-loading source file for updates after errors 2020-06-08 15:16:40 -04:00
Andrew Kelley
cf654b52d6 stage2: -femit-zir respects decl names and supports cycles 2020-06-08 15:16:40 -04:00
Noam Preil
c405844b0a [Stage2/x86] Fix 8-bit register order 2020-06-08 02:28:39 -04:00
Vexu
c27a8bd6be
translate-c: don't crash on complex switches 2020-06-04 14:22:27 +03:00
Andrew Kelley
6524a64bda stage2: fix referencing decls which appear later in the file 2020-06-02 17:43:51 -04:00
Noam Preil
834e8ac2dc [Stage2/Codegen] Extract REX 2020-05-29 13:33:09 -04:00
Andrew Kelley
5d77fede89 remove debug log statements 2020-05-28 22:43:16 -04:00
Andrew Kelley
0bd89979fd stage2: handle deletions and better dependency resolution
* Deleted decls are deleted; unused decls are also detected as deleted.
   Cycles are not yet detected.
 * Re-analysis is smarter and will not cause a re-analysis of dependants
   when only a function body is changed.
2020-05-28 22:42:13 -04:00
Andrew Kelley
3eed7a4dea stage2: first pass at recursive dependency resolution 2020-05-28 12:19:00 -04:00
Andrew Kelley
c7ca1fe6f7 self-hosted: introduce a virtual address allocation scheme
The binary file abstraction changed its struct named "Decl" to
"TextBlock" and it now represents an allocated slice of memory in
the .text section. It has two new fields: prev and next, making it
a linked list node. This allows a TextBlock to find its neighbors.

The ElfFile struct now has free_list and last_text_block fields.
Doc comments for free_list are reproduced here:

A list of text blocks that have surplus capacity. This list can have false
positives, as functions grow and shrink over time, only sometimes being added
or removed from the freelist.

A text block has surplus capacity when its overcapacity value is greater than
minimum_text_block_size * alloc_num / alloc_den. That is, when it has so
much extra capacity, that we could fit a small new symbol in it, itself with
ideal_capacity or more.

Ideal capacity is defined by size * alloc_num / alloc_den.

Overcapacity is measured by actual_capacity - ideal_capacity. Note that
overcapacity can be negative. A simple way to have negative overcapacity is to
allocate a fresh text block, which will have ideal capacity, and then grow it
by 1 byte. It will then have -1 overcapacity.

The last_text_block keeps track of the end of the .text section.

Allocation, freeing, and resizing decls are all now more sophisticated,
and participate in the virtual address allocation scheme. There is no
longer the possibility for virtual address collisions.
2020-05-27 15:23:27 -04:00
Vexu
cd5b7b9e1d
translate-c: use correct scope in for loop condition 2020-05-27 14:14:17 +03:00
Noam Preil
07472fb453 [Stage2/Codegen] Properly handle arch in genCall 2020-05-24 20:49:29 -04:00
Andrew Kelley
dd05f2be80 run zig fmt on std lib 2020-05-24 10:04:09 -04:00
Andrew Kelley
2ff3995a70
Merge pull request #5378 from ziglang/speed-up-stage2-parsing
improve std.zig.parse performance using flat arrays for AST nodes and tokens
2020-05-24 09:44:08 -04:00
Andrew Kelley
8a3cd82b85 translate-c: fix a use-after-free bug 2020-05-23 23:15:58 -04:00
Andrew Kelley
c78a2e2e8d translate-c: emit local typedefs 2020-05-23 19:59:26 -04:00
Andrew Kelley
395786fd50 translate-c: fix regression in param name mangling 2020-05-23 19:28:14 -04:00
Andrew Kelley
88f5e3a60d translate-c: fix regression in switch statement 2020-05-23 17:58:35 -04:00
Andrew Kelley
f67b8c68a0 translate-c: fix regression on array initialization 2020-05-23 17:52:46 -04:00
Andrew Kelley
32c27daae4 translate-c: fix decl statement regression 2020-05-23 17:50:35 -04:00
Andrew Kelley
46f50ee76c translate-c: fix regression in do-while loop 2020-05-23 17:25:13 -04:00
Andrew Kelley
1a90a5e63a translate-c is building again, but I have 1 @panic in there 2020-05-23 16:24:03 -04:00
Andrew Kelley
e072692e1f update translate-c to new AST API 2020-05-23 12:48:17 -04:00
Noam Preil
63aa9ffedc [Stage2/Codegen] Typo fix 2020-05-22 15:34:32 -04:00