David Rubin
043b1adb8d
remove @fence ( #21585 )
...
closes #11650
2024-10-04 22:21:27 +00:00
Alex Rønne Petersen
354ea625e5
test: Re-enable "bitcast nan float does not modify signaling bit" for LLVM + arm.
...
This now passes on all targets that we test in CI.
See: https://github.com/ziglang/zig/issues/14366
2024-10-02 04:08:24 +02:00
Meghan Denny
5e4da1ff30
std: add arch bits for s390x-linux ( #21342 )
...
see #21402
2024-09-24 13:35:12 -07:00
Alex Rønne Petersen
f8719c4197
test: Re-enable store vector with memset for LLVM.
...
Closes #16177 .
2024-09-19 18:20:21 -07:00
Alex Rønne Petersen
bdae7d97b9
test: Disable @bitCast of packed struct containing pointer temporarily.
...
TODO: Figure out what to do about this.
Context: https://discourse.llvm.org/t/rfc-remove-most-constant-expressions/63179
After changing our emit strategy for packed structs to just write to memory:
test-behavior
└─ run test behavior-x86_64-linux.6.5...6.5-gnu.2.38-x86_64-ReleaseSmall-libc
└─ zig test ReleaseSmall native failure
error: thread 44346 panic: attempt to unwrap error: ReinterpretDeclRef
/home/alexrp/Source/zig/src/Value.zig:571:42: 0x1f33514 in writeToPackedMemory (zig)
if (!val.ptrHasIntAddr(mod)) return error.ReinterpretDeclRef;
^
/home/alexrp/Source/zig/src/Value.zig:548:17: 0x1f32f45 in writeToPackedMemory (zig)
try field_val.writeToPackedMemory(field_ty, pt, buffer, bit_offset + bits);
^
/home/alexrp/Source/zig/src/codegen/llvm.zig:3706:89: 0x1ca2366 in lowerValueToInt (zig)
val.writeToPackedMemory(ty, pt, std.mem.sliceAsBytes(limbs)[0..bytes], 0) catch unreachable;
^
/home/alexrp/Source/zig/src/codegen/llvm.zig:4083:49: 0x1a33800 in lowerValue (zig)
return o.lowerValueToInt(llvm_int_ty, arg_val);
^
/home/alexrp/Source/zig/src/codegen/llvm.zig:4798:42: 0x2ec4e6a in resolveValue (zig)
const llvm_val = try o.lowerValue(val.toIntern());
^
/home/alexrp/Source/zig/src/codegen/llvm.zig:4789:47: 0x2ec4bd3 in resolveInst (zig)
const llvm_val = try self.resolveValue((try self.air.value(inst, self.ng.object.pt)).?);
^
/home/alexrp/Source/zig/src/codegen/llvm.zig:8996:49: 0x2f022e9 in airStore (zig)
const src_operand = try self.resolveInst(bin_op.rhs);
^
/home/alexrp/Source/zig/src/codegen/llvm.zig:4967:53: 0x29f7260 in genBody (zig)
.store => try self.airStore(inst, false),
^
/home/alexrp/Source/zig/src/codegen/llvm.zig:1682:19: 0x29f147c in updateFunc (zig)
fg.genBody(air.getMainBody()) catch |err| switch (err) {
^
/home/alexrp/Source/zig/src/link/Elf.zig:2916:70: 0x2eb0f15 in updateFunc (zig)
if (self.llvm_object) |llvm_object| return llvm_object.updateFunc(pt, func_index, air, liveness);
^
/home/alexrp/Source/zig/src/link.zig:426:82: 0x29fbef5 in updateFunc (zig)
return @as(*tag.Type(), @fieldParentPtr("base", base)).updateFunc(pt, func_index, air, liveness);
^
/home/alexrp/Source/zig/src/Zcu/PerThread.zig:876:22: 0x25f3d9e in linkerUpdateFunc (zig)
lf.updateFunc(pt, func_index, air, liveness) catch |err| switch (err) {
^
/home/alexrp/Source/zig/src/Compilation.zig:3975:36: 0x21768fe in processOneCodegenJob (zig)
try pt.linkerUpdateFunc(func.func, func.air);
^
/home/alexrp/Source/zig/src/Compilation.zig:3928:36: 0x2176541 in queueCodegenJob (zig)
return processOneCodegenJob(tid, comp, codegen_job);
^
/home/alexrp/Source/zig/src/Compilation.zig:3682:37: 0x1e9d37f in processOneJob (zig)
try comp.queueCodegenJob(tid, .{ .func = .{
^
/home/alexrp/Source/zig/src/Compilation.zig:3638:30: 0x1c1f6c1 in performAllTheWorkInner (zig)
try processOneJob(@intFromEnum(Zcu.PerThread.Id.main), comp, job, main_progress_node);
^
/home/alexrp/Source/zig/src/Compilation.zig:3508:36: 0x1ab6e10 in performAllTheWork (zig)
try comp.performAllTheWorkInner(main_progress_node);
^
/home/alexrp/Source/zig/src/Compilation.zig:2269:31: 0x1ab25b9 in update (zig)
try comp.performAllTheWork(main_progress_node);
^
/home/alexrp/Source/zig/src/main.zig:4156:32: 0x1b01351 in serve (zig)
try comp.update(main_progress_node);
^
/home/alexrp/Source/zig/src/main.zig:3453:22: 0x1b20d7c in buildOutputType (zig)
try serve(
^
/home/alexrp/Source/zig/src/main.zig:267:31: 0x1969c54 in mainArgs (zig)
return buildOutputType(gpa, arena, args, .zig_test);
^
/home/alexrp/Source/zig/src/main.zig:199:20: 0x19669c5 in main (zig)
return mainArgs(gpa, arena, args);
^
/home/alexrp/Source/zig/lib/std/start.zig:614:37: 0x19664ee in main (zig)
const result = root.main() catch |err| {
^
../sysdeps/nptl/libc_start_call_main.h:58:16: 0x7a453da2814f in __libc_start_call_main (../sysdeps/x86/libc-start.c)
../csu/libc-start.c:360:3: 0x7a453da28208 in __libc_start_main_impl (../sysdeps/x86/libc-start.c)
???:?:?: 0x1966134 in ??? (???)
???:?:?: 0x0 in ??? (???)
2024-09-19 18:20:21 -07:00
mlugg
2111f4c38b
Sema: mark export on owner nav when exporting function alias
...
Resolves : #20847
2024-09-18 21:42:47 +01:00
Matthew Lugg
41330c96ae
Merge pull request #21428 from mlugg/compare-to-undef
...
Sema: return undefined on comparison of runtime value against undefined
2024-09-17 14:34:10 +01:00
mlugg
4650e5b9fc
Sema: clean up cmpNumeric
...
There is one minor language change here, which is that comparisons of
the form `comptime_inf < runtime_f32` have their results comptime-known.
This is consistent with comparisons against comptime NaN for instance,
which are always comptime known. A corresponding behavior test is added.
This fixes a bug with int comparison elision which my previous commit
somehow triggered. `Sema.compareIntsOnlyPossibleResult` is much cleaner
now!
2024-09-17 11:00:38 +01:00
mlugg
1365be5d02
compiler: provide correct result types to += and -=
...
Resolves : #21341
2024-09-16 16:42:42 +01:00
mlugg
258236ec1b
Sema: don't emit instruction when casting @min/@max result to OPV type
...
Resolves : #21408
2024-09-15 17:52:35 +01:00
mlugg
19924ca289
Sema: give try operand error{} result type in non-errorable functions
...
Resolves : #21414
2024-09-15 16:51:26 +01:00
David Rubin
bc161430b0
riscv: implement optional_payload_ptr_set
2024-09-12 20:29:10 -04:00
xdBronch
0329b8387c
make decl literals work with single item pointers
2024-09-12 20:29:10 -04:00
mlugg
03c363300f
AstGen: do not allow unlabeled break to exit a labeled switch
...
`break`ing from something which isn't a loop should always be opt-in.
This was a bug in #21257 .
2024-09-12 22:52:23 +01:00
Matthew Lugg
0001f91e4e
Merge pull request #21287 from linusg/deprecated-default-init
...
Replace deprecated default initializations with decl literals
2024-09-12 19:50:38 +01:00
Linus Groh
8588964972
Replace deprecated default initializations with decl literals
2024-09-12 16:01:23 +01:00
Alex Rønne Petersen
5cb9668632
test: Re-enable a bunch of behavior tests with LLVM.
...
Closes #10627 .
Closes #12013 .
Closes #18034 .
2024-09-12 07:28:37 +02:00
Andrew Kelley
4fba7336a9
Merge pull request #21269 from alexrp/soft-float
...
Fix soft float support, split musl triples by float ABI, and enable CI
2024-09-11 17:41:55 -07:00
Alex Rønne Petersen
26119bd98d
test: Skip some floating point tests that fail on arm-linux-(gnu,musl)eabi.
...
https://github.com/ziglang/zig/issues/21234
2024-09-10 08:53:30 +02:00
Alex Rønne Petersen
5285f41267
test: Disable store vector with memset on soft float arm.
...
https://github.com/ziglang/zig/issues/16177
2024-09-10 08:53:30 +02:00
Alex Rønne Petersen
ccf852c31e
test: Re-enable vector reduce operation for most LLVM targets.
...
mips64 failure is tracked in #21091 .
Closes #7138 .
2024-09-07 02:47:57 +02:00
Alex Rønne Petersen
5c128a8990
test: Re-enable vector shift operators for all LLVM targets.
...
Closes #4951 .
2024-09-07 02:47:57 +02:00
Andrew Kelley
1511a4171f
Merge pull request #21310 from alexrp/ppc64-tests
...
Force ELFv2 for PPC64 and add `powerpc64-linux-(none,musl)` to CI
2024-09-06 10:48:21 -07:00
Andrew Kelley
3929cac154
Merge pull request #21257 from mlugg/computed-goto-3
...
compiler: implement labeled switch/continue
2024-09-04 18:31:28 -07:00
Alex Rønne Petersen
40ee682517
test: Disable store vector with memset on powerpc64.
...
This will be re-enabled with LLVM 19.
2024-09-05 01:15:33 +02:00
Alex Rønne Petersen
2a6eecff3e
test: Disable reinterpret packed union for powerpc64 too.
...
https://github.com/ziglang/zig/issues/21050
2024-09-05 01:15:33 +02:00
Michael Dusan
7a4d69983a
AstGen: update @errorCast to maybe eval to err
...
Consequently, `AstGen.ret()` now passes the error code to
`.defer_error_code`. Previously, the error union value was passed.
closes #20371
2024-09-03 22:56:23 +01:00
David Rubin
0d295d7635
riscv: implement switch_dispatch & loop_switch_br
2024-09-01 18:31:01 +01:00
Jacob Young
d5b01df3c8
x86_64: implement loop_switch_br and switch_dispatch
2024-09-01 18:31:01 +01:00
mlugg
b7a55cd6c3
AstGen: allow breaking from labeled switch
...
Also, don't use the special switch lowering for errors if the switch
is labeled; this isn't currently supported. Related: #20627 .
2024-09-01 18:31:01 +01:00
mlugg
5e12ca9fe3
compiler: implement labeled switch/continue
2024-09-01 18:30:31 +01:00
mlugg
6e3e23a941
compiler: implement decl literals
...
Resolves : #9938
2024-09-01 17:34:07 +01:00
mlugg
9e683f0f35
compiler: provide result type to operand of try
...
This is mainly useful in conjunction with Decl Literals (#9938 ).
Resolves : #19777
2024-09-01 17:34:07 +01:00
David Rubin
fbac7afa0f
riscv: implement errunion_payload_ptr_set
2024-09-01 17:34:06 +01:00
mlugg
c3fb30803f
behavior: avoid field/decl name conflicts
2024-08-29 23:43:52 +01:00
mlugg
0fe3fd01dd
std: update std.builtin.Type fields to follow naming conventions
...
The compiler actually doesn't need any functional changes for this: Sema
does reification based on the tag indices of `std.builtin.Type` already!
So, no zig1.wasm update is necessary.
This change is necessary to disallow name clashes between fields and
decls on a type, which is a prerequisite of #9938 .
2024-08-28 08:39:59 +01:00
mlugg
4c0f021c2e
behavior: import unintentionally excluded file from behavior.zig
...
And remove the now-invalid test for the return value of `@branchHint`.
2024-08-27 00:44:35 +01:00
mlugg
f47f6d766e
behavior,cases: add @branchHint test coverage
2024-08-27 00:44:35 +01:00
mlugg
6808ce27bd
compiler,lib,test,langref: migrate @setCold to @branchHint
2024-08-27 00:44:35 +01:00
mlugg
a3a737e9a6
lib,test,tools,doc: update usages of @export
2024-08-27 00:44:35 +01:00
Alex Rønne Petersen
ecbc701376
test: Disable vector reduce operation on mips64.
...
https://github.com/ziglang/zig/issues/21091
2024-08-18 07:27:23 +02:00
Alex Rønne Petersen
d4d6b23d64
test: Disable @min/max for floats on mips64.
...
https://github.com/ziglang/zig/issues/21090
2024-08-18 07:27:23 +02:00
Jakub Konka
90989be0e3
Merge pull request #21065 from ziglang/elf-zig-got
...
elf: replace .got.zig with a zig jump table
2024-08-16 21:19:44 +02:00
David Rubin
2e8351cc9e
elf: fix up riscv for .got.zig rewrite
2024-08-15 08:53:41 +02:00
Alex Rønne Petersen
19a91084c2
test: Partially disable vector float operators on mips.
...
https://github.com/ziglang/zig/issues/21051
2024-08-12 13:34:19 +02:00
Alex Rønne Petersen
abf6f35654
test: Disable reinterpret packed union on mips.
...
https://github.com/ziglang/zig/issues/21050
2024-08-12 13:34:19 +02:00
mlugg
548a087faf
compiler: split Decl into Nav and Cau
...
The type `Zcu.Decl` in the compiler is problematic: over time it has
gained many responsibilities. Every source declaration, container type,
generic instantiation, and `@extern` has a `Decl`. The functions of
these `Decl`s are in some cases entirely disjoint.
After careful analysis, I determined that the two main responsibilities
of `Decl` are as follows:
* A `Decl` acts as the "subject" of semantic analysis at comptime. A
single unit of analysis is either a runtime function body, or a
`Decl`. It registers incremental dependencies, tracks analysis errors,
etc.
* A `Decl` acts as a "global variable": a pointer to it is consistent,
and it may be lowered to a specific symbol by the codegen backend.
This commit eliminates `Decl` and introduces new types to model these
responsibilities: `Cau` (Comptime Analysis Unit) and `Nav` (Named
Addressable Value).
Every source declaration, and every container type requiring resolution
(so *not* including `opaque`), has a `Cau`. For a source declaration,
this `Cau` performs the resolution of its value. (When #131 is
implemented, it is unsolved whether type and value resolution will share
a `Cau` or have two distinct `Cau`s.) For a type, this `Cau` is the
context in which type resolution occurs.
Every non-`comptime` source declaration, every generic instantiation,
and every distinct `extern` has a `Nav`. These are sent to codegen/link:
the backends by definition do not care about `Cau`s.
This commit has some minor technically-breaking changes surrounding
`usingnamespace`. I don't think they'll impact anyone, since the changes
are fixes around semantics which were previously inconsistent (the
behavior changed depending on hashmap iteration order!).
Aside from that, this changeset has no significant user-facing changes.
Instead, it is an internal refactor which makes it easier to correctly
model the responsibilities of different objects, particularly regarding
incremental compilation. The performance impact should be negligible,
but I will take measurements before merging this work into `master`.
Co-authored-by: Jacob Young <jacobly0@users.noreply.github.com>
Co-authored-by: Jakub Konka <kubkon@jakubkonka.com>
2024-08-11 07:29:41 +01:00
Andrew Kelley
cf87a1a7cf
language: add module name field to @src
...
closes #20963
2024-08-08 07:47:14 -07:00
Alex Rønne Petersen
e5c75479c2
std.Target: Rework isPPC()/isPPC64() functions.
...
* Rename isPPC() -> isPowerPC32().
* Rename isPPC64() -> isPowerPC64().
* Add new isPowerPC() function which covers both.
There was confusion even in the standard library about what isPPC() meant. This
change makes these functions work how I think most people actually expect them
to work, and makes them consistent with isMIPS(), isSPARC(), etc.
I chose to rename from PPC to PowerPC because 1) it's more consistent with the
other functions, and 2) it'll cause loud rather than silent breakage for anyone
who might have been depending on isPPC() while misunderstanding it.
2024-08-01 20:58:05 +02:00
Andrew Kelley
8f7cbaa4c0
Merge pull request #20870 from alexrp/target-cleanup-3
...
`std.Target`: Remove more dead OS/architecture tags
2024-08-01 01:32:32 -07:00