mirror of
https://codeberg.org/ziglang/zig.git
synced 2025-12-07 14:24:43 +00:00
3df67dc414
This is from Qualcomm's fork: https://github.com/quic/musl I maintain a fork of musl where I rebase Qualcomm's changes on top of the latest musl release, which I then use as the basis for musl updates in Zig. My fork can be found here: https://github.com/alexrp/musl/tree/hexagon
78 lines
2.3 KiB
C
Vendored
78 lines
2.3 KiB
C
Vendored
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#define __SYSCALL_LL_E(x) \
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((union { long long ll; long l[2]; }){ .ll = x }).l[0], \
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((union { long long ll; long l[2]; }){ .ll = x }).l[1]
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#define __SYSCALL_LL_O(x) 0, __SYSCALL_LL_E((x))
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#define __asm_syscall(...) do { \
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__asm__ __volatile__ ( "trap0(#1)" \
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: "=r"(r0) : __VA_ARGS__ : "memory"); \
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return r0; \
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} while (0)
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static inline long __syscall0(long n)
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{
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register long r6 __asm__("r6") = n;
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register long r0 __asm__("r0");
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__asm_syscall("r"(r6));
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}
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static inline long __syscall1(long n, long a)
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{
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register long r6 __asm__("r6") = n;
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register long r0 __asm__("r0") = a;
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__asm_syscall("r"(r6), "0"(r0));
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}
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static inline long __syscall2(long n, long a, long b)
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{
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register long r6 __asm__("r6") = n;
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register long r0 __asm__("r0") = a;
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register long r1 __asm__("r1") = b;
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__asm_syscall("r"(r6), "0"(r0), "r"(r1));
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}
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static inline long __syscall3(long n, long a, long b, long c)
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{
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register long r6 __asm__("r6") = n;
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register long r0 __asm__("r0") = a;
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register long r1 __asm__("r1") = b;
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register long r2 __asm__("r2") = c;
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__asm_syscall("r"(r6), "0"(r0), "r"(r1), "r"(r2));
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}
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static inline long __syscall4(long n, long a, long b, long c, long d)
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{
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register long r6 __asm__("r6") = n;
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register long r0 __asm__("r0") = a;
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register long r1 __asm__("r1") = b;
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register long r2 __asm__("r2") = c;
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register long r3 __asm__("r3") = d;
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__asm_syscall("r"(r6), "0"(r0), "r"(r1), "r"(r2), "r"(r3));
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}
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static inline long __syscall5(long n, long a, long b, long c, long d, long e)
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{
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register long r6 __asm__("r6") = n;
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register long r0 __asm__("r0") = a;
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register long r1 __asm__("r1") = b;
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register long r2 __asm__("r2") = c;
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register long r3 __asm__("r3") = d;
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register long r4 __asm__("r4") = e;
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__asm_syscall("r"(r6), "0"(r0), "r"(r1), "r"(r2), "r"(r3), "r"(r4));
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}
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static inline long __syscall6(long n, long a, long b, long c, long d, long e,
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long f)
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{
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register long r6 __asm__("r6") = n;
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register long r0 __asm__("r0") = a;
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register long r1 __asm__("r1") = b;
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register long r2 __asm__("r2") = c;
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register long r3 __asm__("r3") = d;
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register long r4 __asm__("r4") = e;
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register long r5 __asm__("r5") = f;
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__asm_syscall("r"(r6), "0"(r0), "r"(r1), "r"(r2), "r"(r3), "r"(r4), "r"(r5));
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}
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#define SYSCALL_FADVISE_6_ARG
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