d18g 71ec89383b Fix lakemont CpuModel (#9099) ... Lakemont has no x86, no MMX, no SSE and no way of handling any fp-math. In theory LLVM is able to implicitly use the soft-float emulation library calls to legalize any such operation but, given Zig's use of many non-standard features, sometimes we hit a weak spot in the X86 codegen backend. Consider this as a work-around for this LLVM problem, fixing the problem in LLVM is not so high in my todo list as the target is pretty niche and Intel axed it in '19. (Commit message by @LemonBoy)		2021-06-17 20:28:37 -07:00
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spirv	SPIR-V: Split out registry from gen_spirv_spec.zig	2021-05-14 19:49:32 +02:00
gen_spirv_spec.zig	zig fmt	2021-06-11 10:28:42 -07:00
gen_stubs.zig	stage2: use %type not @type for libc stubs	2021-01-18 11:04:33 -08:00
merge_anal_dumps.zig	update depreciated code (#7502)	2020-12-23 13:01:29 +02:00
process_headers.zig	Breaking hash map changes for 0.8.0	2021-06-03 17:02:16 -05:00
update_clang_options.zig	zig cc: recognize more pie flags	2021-06-14 12:13:03 -07:00
update_cpu_features.zig	Fix lakemont CpuModel (#9099)	2021-06-17 20:28:37 -07:00
update_glibc.zig	Breaking hash map changes for 0.8.0	2021-06-03 17:02:16 -05:00
update_spirv_features.zig	zig fmt	2021-06-11 10:28:42 -07:00
zig-gdb.py	gdb pretty printers for slices and optionals	2020-12-23 20:21:47 +02:00
zig_gdb_pretty_printers.py	gdb pretty printers for slices and optionals	2020-12-23 20:21:47 +02:00