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Felix Queißner 7c74edec8d
Adds new cpu architectures propeller1 and propeller2. (#21563) 
* Adds new cpu architectures propeller1 and propeller2.

These cpu architectures allow targeting the Parallax Propeller 1 and Propeller 2, which are both very special microcontrollers with 512 registers and 8 cpu cores.

Resolves #21559

* Adds std.elf.EM.PROPELLER and std.elf.EM.PROPELLER2
* Fixes missing switch prongs in src/codegen/llvm.zig
* Fixes order in std.Target.Arch

---------

Co-authored-by: Felix "xq" Queißner <git@random-projects.net>
2024-10-04 13:53:28 -07:00
..
aarch64.zig std.Target: Regenerate CPU models/features based on LLVM 19.1.0. 2024-09-24 11:45:01 +02:00
amdgpu.zig std.Target: Update CPU models/features for LLVM 19.1.0. 2024-09-19 18:20:22 -07:00
arc.zig std: update std.builtin.Type fields to follow naming conventions 2024-08-28 08:39:59 +01:00
arm.zig std.Target: Regenerate CPU models/features based on LLVM 19.1.0. 2024-09-24 11:45:01 +02:00
avr.zig std: update std.builtin.Type fields to follow naming conventions 2024-08-28 08:39:59 +01:00
bpf.zig std: update std.builtin.Type fields to follow naming conventions 2024-08-28 08:39:59 +01:00
csky.zig std: update std.builtin.Type fields to follow naming conventions 2024-08-28 08:39:59 +01:00
hexagon.zig std: update std.builtin.Type fields to follow naming conventions 2024-08-28 08:39:59 +01:00
lanai.zig update_cpu_features: Don't delete the output file if there are no CPU features. 2024-10-03 05:01:14 +02:00
loongarch.zig std.Target: Update CPU models/features for LLVM 19. 2024-09-19 18:20:21 -07:00
m68k.zig std: update std.builtin.Type fields to follow naming conventions 2024-08-28 08:39:59 +01:00
mips.zig std.Target: Update CPU models/features for LLVM 19. 2024-09-19 18:20:21 -07:00
msp430.zig std: update std.builtin.Type fields to follow naming conventions 2024-08-28 08:39:59 +01:00
nvptx.zig std.Target: Update CPU models/features for LLVM 19. 2024-09-19 18:20:21 -07:00
powerpc.zig std.Target: Update CPU models/features for LLVM 19. 2024-09-19 18:20:21 -07:00
propeller.zig Adds new cpu architectures propeller1 and propeller2. (#21563) 2024-10-04 13:53:28 -07:00
Query.zig std.Target: Introduce Abi.androideabi to distinguish the soft float case. 2024-09-24 09:23:24 +02:00
riscv.zig std.Target: Update CPU models/features for LLVM 19. 2024-09-19 18:20:21 -07:00
s390x.zig std.Target: Update CPU models/features for LLVM 19. 2024-09-19 18:20:21 -07:00
sparc.zig std: update std.builtin.Type fields to follow naming conventions 2024-08-28 08:39:59 +01:00
spirv.zig std: update std.builtin.Type fields to follow naming conventions 2024-08-28 08:39:59 +01:00
ve.zig std: update std.builtin.Type fields to follow naming conventions 2024-08-28 08:39:59 +01:00
wasm.zig std.Target: Update CPU models/features for LLVM 19. 2024-09-19 18:20:21 -07:00
x86.zig std.Target: Update CPU models/features for LLVM 19.1.0. 2024-09-19 18:20:22 -07:00
xcore.zig update_cpu_features: Don't delete the output file if there are no CPU features. 2024-10-03 05:01:14 +02:00
xtensa.zig std: update std.builtin.Type fields to follow naming conventions 2024-08-28 08:39:59 +01:00