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The big endian RISC-V effort is mostly driven by MIPS (the company) which is pivoting to RISC-V, and presumably needs a big endian variant to fill the niche that big endian MIPS (the ISA) did. GCC already supports these targets, but LLVM support will only appear in 22; this commit just adds the necessary target knowledge and checks on our end. |
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| .. | ||
| build-web | ||
| c | ||
| compiler | ||
| compiler_rt | ||
| docs | ||
| include | ||
| init | ||
| libc | ||
| libcxx | ||
| libcxxabi | ||
| libtsan | ||
| libunwind | ||
| std | ||
| c.zig | ||
| compiler_rt.zig | ||
| fuzzer.zig | ||
| ubsan_rt.zig | ||
| zig.h | ||