mirror of
https://codeberg.org/ziglang/zig.git
synced 2025-12-06 05:44:20 +00:00
5d019abe4e
The big endian RISC-V effort is mostly driven by MIPS (the company) which is pivoting to RISC-V, and presumably needs a big endian variant to fill the niche that big endian MIPS (the ISA) did. GCC already supports these targets, but LLVM support will only appear in 22; this commit just adds the necessary target knowledge and checks on our end. |
||
|---|---|---|
| .. | ||
| behavior | ||
| c_abi | ||
| c_import | ||
| cases | ||
| incremental | ||
| link | ||
| src | ||
| standalone | ||
| assemble_and_link.zig | ||
| behavior.zig | ||
| c_import.zig | ||
| cases.zig | ||
| compare_output.zig | ||
| compile_errors.zig | ||
| gen_h.zig | ||
| llvm_ir.zig | ||
| llvm_targets.zig | ||
| nvptx.zig | ||
| run_translated_c.zig | ||
| stack_traces.zig | ||
| tests.zig | ||
| translate_c.zig | ||