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zig/lib/std/Target
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Alex Rønne Petersen 5e9e1fb0c8
std.Target: adjustments to LoongArch CPU models 
* Remove the generic model; we already have generic_la32 and generic_la64 and
  pick appropriately based on bitness.
* Remove the loongarch64 model. We used this as our baseline for 64-bit, but it's
  actually pretty misleading and useless; it doesn't represent any real CPU and
  has less features than generic_la64.
* Add la64v1_0 and la64v1_1 models.
* Change our baseline CPU model for 64-bit to be la64v1_0, thus adding LSX to
  the baseline feature set.
2025-09-18 12:42:24 +02:00
..
aarch64.zig std.Target: update CPU features to LLVM 21 2025-08-30 06:36:41 +02:00
amdgcn.zig std.Target: update CPU features to LLVM 21 2025-08-30 06:36:41 +02:00
arc.zig refactor update_cpu_features.zig 2024-11-25 01:11:15 -08:00
arm.zig std.Target: update CPU features to LLVM 21 2025-08-30 06:36:41 +02:00
avr.zig std.Target: update CPU features to LLVM 21 2025-08-30 06:36:41 +02:00
bpf.zig refactor update_cpu_features.zig 2024-11-25 01:11:15 -08:00
csky.zig std.Target: Update CPU models/features for LLVM 20. 2025-04-04 06:08:09 +02:00
generic.zig std.Target: Introduce Cpu convenience functions for feature tests. 2025-06-05 06:12:00 +02:00
hexagon.zig std.Target: Update CPU models/features for LLVM 20. 2025-04-04 06:08:09 +02:00
lanai.zig refactor update_cpu_features.zig 2024-11-25 01:11:15 -08:00
loongarch.zig std.Target: adjustments to LoongArch CPU models 2025-09-18 12:42:24 +02:00
m68k.zig refactor update_cpu_features.zig 2024-11-25 01:11:15 -08:00
mips.zig std.Target: update CPU features to LLVM 21 2025-08-30 06:36:41 +02:00
msp430.zig refactor update_cpu_features.zig 2024-11-25 01:11:15 -08:00
nvptx.zig std.Target: update CPU features to LLVM 21 2025-08-30 06:36:41 +02:00
powerpc.zig std.Target: update CPU features to LLVM 21 2025-08-30 06:36:41 +02:00
propeller.zig std.Target: Remove Cpu.Arch.propeller2 and use a CPU feature instead. 2025-02-17 19:17:55 +01:00
Query.zig std.ArrayList: make unmanaged the default 2025-08-11 15:52:49 -07:00
riscv.zig std.Target: update CPU features to LLVM 21 2025-08-30 06:36:41 +02:00
s390x.zig std.Target: update CPU features to LLVM 21 2025-08-30 06:36:41 +02:00
sparc.zig std.Target: update CPU features to LLVM 21 2025-08-30 06:36:41 +02:00
spirv.zig remove spirv cpu arch 2025-06-23 06:03:03 +02:00
ve.zig refactor update_cpu_features.zig 2024-11-25 01:11:15 -08:00
wasm.zig std.Target: Update CPU models/features for LLVM 20. 2025-04-04 06:08:09 +02:00
x86.zig std.Target.x86: purge avx10.n-256, rename avx10.n_512 to avx10.n, require evex512 for avx512f 2025-08-30 06:36:41 +02:00
xcore.zig refactor update_cpu_features.zig 2024-11-25 01:11:15 -08:00
xtensa.zig std.Target: update CPU features to LLVM 21 2025-08-30 06:36:41 +02:00