mirror of
https://codeberg.org/ziglang/zig.git
synced 2025-12-06 22:04:21 +00:00
9f2a200a3f
Clang fails to compile the CBE translation of this code ("non-ASM
statement in naked function"). Similar to the implementations of
`restore_rt` on x86 and ARM, when the CBE is in use, this commit employs
alternative inline assembly that avoids using non-immediate input
operands.
381 lines
11 KiB
Zig
381 lines
11 KiB
Zig
const builtin = @import("builtin");
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const std = @import("../../std.zig");
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const maxInt = std.math.maxInt;
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const linux = std.os.linux;
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const SYS = linux.SYS;
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const socklen_t = linux.socklen_t;
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const iovec = std.posix.iovec;
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const iovec_const = std.posix.iovec_const;
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const uid_t = linux.uid_t;
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const gid_t = linux.gid_t;
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const pid_t = linux.pid_t;
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const stack_t = linux.stack_t;
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const sigset_t = linux.sigset_t;
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const sockaddr = linux.sockaddr;
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const timespec = linux.timespec;
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pub fn syscall0(number: SYS) usize {
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// r0 is both an input register and a clobber. musl and glibc achieve this with
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// a "+" constraint, which isn't supported in Zig, so instead we separately list
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// r0 as both an input and an output. (Listing it as an input and a clobber would
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// cause the C backend to emit invalid code; see #25209.)
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var r0_out: usize = undefined;
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return asm volatile (
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\\ sc
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\\ bns+ 1f
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\\ neg 3, 3
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\\ 1:
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: [ret] "={r3}" (-> usize),
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[r0_out] "={r0}" (r0_out),
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: [number] "{r0}" (@intFromEnum(number)),
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: .{ .memory = true, .cr0 = true, .r4 = true, .r5 = true, .r6 = true, .r7 = true, .r8 = true, .r9 = true, .r10 = true, .r11 = true, .r12 = true, .ctr = true, .xer = true });
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}
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pub fn syscall1(number: SYS, arg1: usize) usize {
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// r0 is both an input and a clobber.
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var r0_out: usize = undefined;
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return asm volatile (
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\\ sc
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\\ bns+ 1f
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\\ neg 3, 3
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\\ 1:
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: [ret] "={r3}" (-> usize),
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[r0_out] "={r0}" (r0_out),
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: [number] "{r0}" (@intFromEnum(number)),
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[arg1] "{r3}" (arg1),
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: .{ .memory = true, .cr0 = true, .r4 = true, .r5 = true, .r6 = true, .r7 = true, .r8 = true, .r9 = true, .r10 = true, .r11 = true, .r12 = true, .ctr = true, .xer = true });
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}
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pub fn syscall2(number: SYS, arg1: usize, arg2: usize) usize {
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// These registers are both inputs and clobbers.
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var r0_out: usize = undefined;
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var r4_out: usize = undefined;
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return asm volatile (
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\\ sc
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\\ bns+ 1f
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\\ neg 3, 3
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\\ 1:
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: [ret] "={r3}" (-> usize),
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[r0_out] "={r0}" (r0_out),
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[r4_out] "={r4}" (r4_out),
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: [number] "{r0}" (@intFromEnum(number)),
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[arg1] "{r3}" (arg1),
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[arg2] "{r4}" (arg2),
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: .{ .memory = true, .cr0 = true, .r5 = true, .r6 = true, .r7 = true, .r8 = true, .r9 = true, .r10 = true, .r11 = true, .r12 = true, .ctr = true, .xer = true });
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}
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pub fn syscall3(number: SYS, arg1: usize, arg2: usize, arg3: usize) usize {
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// These registers are both inputs and clobbers.
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var r0_out: usize = undefined;
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var r4_out: usize = undefined;
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var r5_out: usize = undefined;
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return asm volatile (
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\\ sc
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\\ bns+ 1f
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\\ neg 3, 3
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\\ 1:
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: [ret] "={r3}" (-> usize),
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[r0_out] "={r0}" (r0_out),
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[r4_out] "={r4}" (r4_out),
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[r5_out] "={r5}" (r5_out),
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: [number] "{r0}" (@intFromEnum(number)),
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[arg1] "{r3}" (arg1),
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[arg2] "{r4}" (arg2),
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[arg3] "{r5}" (arg3),
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: .{ .memory = true, .cr0 = true, .r6 = true, .r7 = true, .r8 = true, .r9 = true, .r10 = true, .r11 = true, .r12 = true, .ctr = true, .xer = true });
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}
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pub fn syscall4(number: SYS, arg1: usize, arg2: usize, arg3: usize, arg4: usize) usize {
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// These registers are both inputs and clobbers.
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var r0_out: usize = undefined;
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var r4_out: usize = undefined;
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var r5_out: usize = undefined;
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var r6_out: usize = undefined;
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return asm volatile (
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\\ sc
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\\ bns+ 1f
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\\ neg 3, 3
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\\ 1:
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: [ret] "={r3}" (-> usize),
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[r0_out] "={r0}" (r0_out),
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[r4_out] "={r4}" (r4_out),
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[r5_out] "={r5}" (r5_out),
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[r6_out] "={r6}" (r6_out),
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: [number] "{r0}" (@intFromEnum(number)),
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[arg1] "{r3}" (arg1),
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[arg2] "{r4}" (arg2),
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[arg3] "{r5}" (arg3),
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[arg4] "{r6}" (arg4),
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: .{ .memory = true, .cr0 = true, .r7 = true, .r8 = true, .r9 = true, .r10 = true, .r11 = true, .r12 = true, .ctr = true, .xer = true });
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}
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pub fn syscall5(number: SYS, arg1: usize, arg2: usize, arg3: usize, arg4: usize, arg5: usize) usize {
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// These registers are both inputs and clobbers.
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var r0_out: usize = undefined;
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var r4_out: usize = undefined;
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var r5_out: usize = undefined;
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var r6_out: usize = undefined;
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var r7_out: usize = undefined;
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return asm volatile (
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\\ sc
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\\ bns+ 1f
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\\ neg 3, 3
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\\ 1:
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: [ret] "={r3}" (-> usize),
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[r0_out] "={r0}" (r0_out),
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[r4_out] "={r4}" (r4_out),
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[r5_out] "={r5}" (r5_out),
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[r6_out] "={r6}" (r6_out),
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[r7_out] "={r7}" (r7_out),
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: [number] "{r0}" (@intFromEnum(number)),
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[arg1] "{r3}" (arg1),
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[arg2] "{r4}" (arg2),
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[arg3] "{r5}" (arg3),
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[arg4] "{r6}" (arg4),
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[arg5] "{r7}" (arg5),
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: .{ .memory = true, .cr0 = true, .r8 = true, .r9 = true, .r10 = true, .r11 = true, .r12 = true, .ctr = true, .xer = true });
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}
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pub fn syscall6(
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number: SYS,
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arg1: usize,
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arg2: usize,
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arg3: usize,
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arg4: usize,
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arg5: usize,
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arg6: usize,
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) usize {
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// These registers are both inputs and clobbers.
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var r0_out: usize = undefined;
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var r4_out: usize = undefined;
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var r5_out: usize = undefined;
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var r6_out: usize = undefined;
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var r7_out: usize = undefined;
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var r8_out: usize = undefined;
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return asm volatile (
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\\ sc
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\\ bns+ 1f
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\\ neg 3, 3
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\\ 1:
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: [ret] "={r3}" (-> usize),
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[r0_out] "={r0}" (r0_out),
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[r4_out] "={r4}" (r4_out),
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[r5_out] "={r5}" (r5_out),
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[r6_out] "={r6}" (r6_out),
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[r7_out] "={r7}" (r7_out),
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[r8_out] "={r8}" (r8_out),
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: [number] "{r0}" (@intFromEnum(number)),
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[arg1] "{r3}" (arg1),
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[arg2] "{r4}" (arg2),
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[arg3] "{r5}" (arg3),
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[arg4] "{r6}" (arg4),
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[arg5] "{r7}" (arg5),
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[arg6] "{r8}" (arg6),
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: .{ .memory = true, .cr0 = true, .r9 = true, .r10 = true, .r11 = true, .r12 = true, .ctr = true, .xer = true });
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}
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pub fn clone() callconv(.naked) usize {
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// __clone(func, stack, flags, arg, ptid, tls, ctid)
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// 3, 4, 5, 6, 7, 8, 9
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//
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// syscall(SYS_clone, flags, stack, ptid, tls, ctid)
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// 0 3, 4, 5, 6, 7
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asm volatile (
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\\ # create initial stack frame for new thread
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\\ clrrdi 4, 4, 4
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\\ li 0, 0
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\\ stdu 0,-32(4)
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\\
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\\ # save fn and arg to child stack
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\\ std 3, 8(4)
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\\ std 6, 16(4)
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\\
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\\ # shuffle args into correct registers and call SYS_clone
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\\ mr 3, 5
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\\ #mr 4, 4
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\\ mr 5, 7
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\\ mr 6, 8
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\\ mr 7, 9
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\\ li 0, 120 # SYS_clone = 120
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\\ sc
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\\
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\\ # if error, negate return (errno)
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\\ bns+ 1f
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\\ neg 3, 3
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\\
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\\1:
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\\ # if we're the parent, return
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\\ cmpwi cr7, 3, 0
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\\ bnelr cr7
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\\
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\\ # we're the child
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);
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if (builtin.unwind_tables != .none or !builtin.strip_debug_info) asm volatile (
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\\ .cfi_undefined lr
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);
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asm volatile (
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\\ li 31, 0
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\\ mtlr 0
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\\
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\\ # call fn(arg)
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\\ ld 3, 16(1)
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\\ ld 12, 8(1)
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\\ mtctr 12
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\\ bctrl
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\\
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\\ # call SYS_exit. exit code is already in r3 from fn return value
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\\ li 0, 1 # SYS_exit = 1
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\\ sc
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);
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}
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pub const restore = restore_rt;
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pub fn restore_rt() callconv(.naked) noreturn {
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switch (@import("builtin").zig_backend) {
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.stage2_c => asm volatile (
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\\ li 0, %[number]
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\\ sc
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:
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: [number] "i" (@intFromEnum(SYS.rt_sigreturn)),
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: .{ .memory = true, .cr0 = true, .r4 = true, .r5 = true, .r6 = true, .r7 = true, .r8 = true, .r9 = true, .r10 = true, .r11 = true, .r12 = true }),
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else => _ = asm volatile (
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\\ sc
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:
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: [number] "{r0}" (@intFromEnum(SYS.rt_sigreturn)),
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: .{ .memory = true, .cr0 = true, .r4 = true, .r5 = true, .r6 = true, .r7 = true, .r8 = true, .r9 = true, .r10 = true, .r11 = true, .r12 = true }),
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}
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}
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pub const F = struct {
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pub const DUPFD = 0;
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pub const GETFD = 1;
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pub const SETFD = 2;
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pub const GETFL = 3;
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pub const SETFL = 4;
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pub const SETOWN = 8;
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pub const GETOWN = 9;
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pub const SETSIG = 10;
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pub const GETSIG = 11;
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pub const GETLK = 5;
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pub const SETLK = 6;
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pub const SETLKW = 7;
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pub const RDLCK = 0;
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pub const WRLCK = 1;
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pub const UNLCK = 2;
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pub const SETOWN_EX = 15;
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pub const GETOWN_EX = 16;
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pub const GETOWNER_UIDS = 17;
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};
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pub const VDSO = struct {
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pub const CGT_SYM = "__kernel_clock_gettime";
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pub const CGT_VER = "LINUX_2.6.15";
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};
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pub const Flock = extern struct {
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type: i16,
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whence: i16,
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start: off_t,
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len: off_t,
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pid: pid_t,
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__unused: [4]u8,
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};
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pub const blksize_t = i64;
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pub const nlink_t = u64;
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pub const time_t = i64;
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pub const mode_t = u32;
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pub const off_t = i64;
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pub const ino_t = u64;
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pub const dev_t = u64;
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pub const blkcnt_t = i64;
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// The `stat` definition used by the Linux kernel.
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pub const Stat = extern struct {
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dev: dev_t,
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ino: ino_t,
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nlink: nlink_t,
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mode: mode_t,
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uid: uid_t,
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gid: gid_t,
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rdev: dev_t,
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size: off_t,
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blksize: blksize_t,
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blocks: blkcnt_t,
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atim: timespec,
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mtim: timespec,
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ctim: timespec,
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__unused: [3]u64,
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pub fn atime(self: @This()) timespec {
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return self.atim;
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}
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pub fn mtime(self: @This()) timespec {
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return self.mtim;
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}
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pub fn ctime(self: @This()) timespec {
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return self.ctim;
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}
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};
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pub const timeval = extern struct {
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sec: isize,
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usec: isize,
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};
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pub const timezone = extern struct {
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minuteswest: i32,
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dsttime: i32,
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};
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pub const greg_t = u64;
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pub const gregset_t = [48]greg_t;
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pub const fpregset_t = [33]f64;
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/// The position of the vscr register depends on endianness.
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/// On C, macros are used to change vscr_word's offset to
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/// account for this. Here we'll just define vscr_word_le
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/// and vscr_word_be. Code must take care to use the correct one.
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pub const vrregset = extern struct {
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vrregs: [32][4]u32 align(16),
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vscr_word_le: u32,
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_pad1: [2]u32,
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vscr_word_be: u32,
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vrsave: u32,
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_pad2: [3]u32,
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};
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pub const vrregset_t = vrregset;
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pub const mcontext_t = extern struct {
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__unused: [4]u64,
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signal: i32,
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_pad0: i32,
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handler: u64,
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oldmask: u64,
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regs: ?*anyopaque,
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gp_regs: gregset_t,
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fp_regs: fpregset_t,
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v_regs: *vrregset_t,
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vmx_reserve: [34 + 34 + 32 + 1]i64,
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};
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pub const ucontext_t = extern struct {
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flags: u32,
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link: ?*ucontext_t,
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stack: stack_t,
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sigmask: [1024 / @bitSizeOf(c_ulong)]c_ulong, // Currently a libc-compatible (1024-bit) sigmask
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mcontext: mcontext_t,
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};
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pub const Elf_Symndx = u32;
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/// TODO
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pub const getcontext = {};
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