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update amdgpu target CPU features

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This commit is contained in:
Andrew Kelley 2021-02-27 01:54:07 -07:00
parent a9f19221e9
commit 02bda72d91
2 changed files with 39 additions and 89 deletions
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118
lib/std/target/amdgpu.zig
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@ -1,8 +1,5 @@
// SPDX-License-Identifier: MIT //! This file is auto-generated by tools/update_cpu_features.zig.
// Copyright (c) 2015-2021 Zig Contributors
// This file is part of [zig](https://ziglang.org/), which is MIT licensed.
// The MIT license requires this copyright notice to be included in all copies
// and substantial portions of the software.
const std = @import("../std.zig"); const std = @import("../std.zig");
const CpuFeature = std.Target.Cpu.Feature; const CpuFeature = std.Target.Cpu.Feature;
const CpuModel = std.Target.Cpu.Model; const CpuModel = std.Target.Cpu.Model;
@ -26,7 +23,6 @@ pub const Feature = enum {
dpp, dpp,
dpp8, dpp8,
ds_src2_insts, ds_src2_insts,
dump_code,
enable_ds128, enable_ds128,
enable_prt_strict_null, enable_prt_strict_null,
fast_denormal_f32, fast_denormal_f32,
@ -76,8 +72,6 @@ pub const Feature = enum {
movrel, movrel,
no_data_dep_hazard, no_data_dep_hazard,
no_sdst_cmpx, no_sdst_cmpx,
no_sram_ecc_support,
no_xnack_support,
nsa_encoding, nsa_encoding,
nsa_to_vmem_bug, nsa_to_vmem_bug,
offset_3f_bug, offset_3f_bug,
@ -101,7 +95,8 @@ pub const Feature = enum {
si_scheduler, si_scheduler,
smem_to_vector_write_hazard, smem_to_vector_write_hazard,
southern_islands, southern_islands,
sram_ecc, sramecc,
sramecc_support,
trap_handler, trap_handler,
trig_reduced_range, trig_reduced_range,
unaligned_access_mode, unaligned_access_mode,
@ -122,6 +117,7 @@ pub const Feature = enum {
wavefrontsize32, wavefrontsize32,
wavefrontsize64, wavefrontsize64,
xnack, xnack,
xnack_support,
}; };
pub usingnamespace CpuFeature.feature_set_fns(Feature); pub usingnamespace CpuFeature.feature_set_fns(Feature);
@ -222,14 +218,9 @@ pub const all_features = blk: {
.description = "Has ds_*_src2 instructions", .description = "Has ds_*_src2 instructions",
.dependencies = featureSet(&[_]Feature{}), .dependencies = featureSet(&[_]Feature{}),
}; };
result[@enumToInt(Feature.dump_code)] = .{
.llvm_name = "dumpcode",
.description = "Dump MachineInstrs in the CodeEmitter",
.dependencies = featureSet(&[_]Feature{}),
};
result[@enumToInt(Feature.enable_ds128)] = .{ result[@enumToInt(Feature.enable_ds128)] = .{
.llvm_name = "enable-ds128", .llvm_name = "enable-ds128",
.description = "Use ds_read|write_b128", .description = "Use ds_{read|write}_b128",
.dependencies = featureSet(&[_]Feature{}), .dependencies = featureSet(&[_]Feature{}),
}; };
result[@enumToInt(Feature.enable_prt_strict_null)] = .{ result[@enumToInt(Feature.enable_prt_strict_null)] = .{
@ -337,7 +328,6 @@ pub const all_features = blk: {
.movrel, .movrel,
.no_data_dep_hazard, .no_data_dep_hazard,
.no_sdst_cmpx, .no_sdst_cmpx,
.no_sram_ecc_support,
.pk_fmac_f16_inst, .pk_fmac_f16_inst,
.register_banking, .register_banking,
.s_memrealtime, .s_memrealtime,
@ -417,6 +407,7 @@ pub const all_features = blk: {
.vgpr_index_mode, .vgpr_index_mode,
.vop3p, .vop3p,
.wavefrontsize64, .wavefrontsize64,
.xnack_support,
}), }),
}; };
result[@enumToInt(Feature.gfx9_insts)] = .{ result[@enumToInt(Feature.gfx9_insts)] = .{
@ -549,16 +540,6 @@ pub const all_features = blk: {
.description = "V_CMPX does not write VCC/SGPR in addition to EXEC", .description = "V_CMPX does not write VCC/SGPR in addition to EXEC",
.dependencies = featureSet(&[_]Feature{}), .dependencies = featureSet(&[_]Feature{}),
}; };
result[@enumToInt(Feature.no_sram_ecc_support)] = .{
.llvm_name = "no-sram-ecc-support",
.description = "Hardware does not support SRAM ECC",
.dependencies = featureSet(&[_]Feature{}),
};
result[@enumToInt(Feature.no_xnack_support)] = .{
.llvm_name = "no-xnack-support",
.description = "Hardware does not support XNACK",
.dependencies = featureSet(&[_]Feature{}),
};
result[@enumToInt(Feature.nsa_encoding)] = .{ result[@enumToInt(Feature.nsa_encoding)] = .{
.llvm_name = "nsa-encoding", .llvm_name = "nsa-encoding",
.description = "Support NSA encoding for image instructions", .description = "Support NSA encoding for image instructions",
@ -662,7 +643,6 @@ pub const all_features = blk: {
.mad_mac_f32_insts, .mad_mac_f32_insts,
.mimg_r128, .mimg_r128,
.movrel, .movrel,
.no_sram_ecc_support,
.s_memtime_inst, .s_memtime_inst,
.trig_reduced_range, .trig_reduced_range,
.unaligned_buffer_access, .unaligned_buffer_access,
@ -695,16 +675,19 @@ pub const all_features = blk: {
.mad_mac_f32_insts, .mad_mac_f32_insts,
.mimg_r128, .mimg_r128,
.movrel, .movrel,
.no_sram_ecc_support,
.no_xnack_support,
.s_memtime_inst, .s_memtime_inst,
.trig_reduced_range, .trig_reduced_range,
.wavefrontsize64, .wavefrontsize64,
}), }),
}; };
result[@enumToInt(Feature.sram_ecc)] = .{ result[@enumToInt(Feature.sramecc)] = .{
.llvm_name = "sram-ecc", .llvm_name = "sramecc",
.description = "Enable SRAM ECC", .description = "Enable SRAMECC",
.dependencies = featureSet(&[_]Feature{}),
};
result[@enumToInt(Feature.sramecc_support)] = .{
.llvm_name = "sramecc-support",
.description = "Hardware supports SRAMECC",
.dependencies = featureSet(&[_]Feature{}), .dependencies = featureSet(&[_]Feature{}),
}; };
result[@enumToInt(Feature.trap_handler)] = .{ result[@enumToInt(Feature.trap_handler)] = .{
@ -787,7 +770,6 @@ pub const all_features = blk: {
.mad_mac_f32_insts, .mad_mac_f32_insts,
.mimg_r128, .mimg_r128,
.movrel, .movrel,
.no_sram_ecc_support,
.s_memrealtime, .s_memrealtime,
.s_memtime_inst, .s_memtime_inst,
.scalar_stores, .scalar_stores,
@ -835,6 +817,11 @@ pub const all_features = blk: {
.description = "Enable XNACK support", .description = "Enable XNACK support",
.dependencies = featureSet(&[_]Feature{}), .dependencies = featureSet(&[_]Feature{}),
}; };
result[@enumToInt(Feature.xnack_support)] = .{
.llvm_name = "xnack-support",
.description = "Hardware supports XNACK",
.dependencies = featureSet(&[_]Feature{}),
};
const ti = @typeInfo(Feature); const ti = @typeInfo(Feature);
for (result) |*elem, i| { for (result) |*elem, i| {
elem.index = i; elem.index = i;
@ -849,7 +836,6 @@ pub const cpu = struct {
.llvm_name = "bonaire", .llvm_name = "bonaire",
.features = featureSet(&[_]Feature{ .features = featureSet(&[_]Feature{
.ldsbankcount32, .ldsbankcount32,
.no_xnack_support,
.sea_islands, .sea_islands,
}), }),
}; };
@ -862,7 +848,7 @@ pub const cpu = struct {
.ldsbankcount32, .ldsbankcount32,
.unpacked_d16_vmem, .unpacked_d16_vmem,
.volcanic_islands, .volcanic_islands,
.xnack, .xnack_support,
}), }),
}; };
pub const fiji = CpuModel{ pub const fiji = CpuModel{
@ -870,7 +856,6 @@ pub const cpu = struct {
.llvm_name = "fiji", .llvm_name = "fiji",
.features = featureSet(&[_]Feature{ .features = featureSet(&[_]Feature{
.ldsbankcount32, .ldsbankcount32,
.no_xnack_support,
.unpacked_d16_vmem, .unpacked_d16_vmem,
.volcanic_islands, .volcanic_islands,
}), }),
@ -904,7 +889,6 @@ pub const cpu = struct {
.lds_misaligned_bug, .lds_misaligned_bug,
.ldsbankcount32, .ldsbankcount32,
.mad_mac_f32_insts, .mad_mac_f32_insts,
.no_xnack_support,
.nsa_encoding, .nsa_encoding,
.nsa_to_vmem_bug, .nsa_to_vmem_bug,
.offset_3f_bug, .offset_3f_bug,
@ -917,6 +901,7 @@ pub const cpu = struct {
.vcmpx_permlane_hazard, .vcmpx_permlane_hazard,
.vmem_to_scalar_write_hazard, .vmem_to_scalar_write_hazard,
.wavefrontsize32, .wavefrontsize32,
.xnack_support,
}), }),
}; };
pub const gfx1011 = CpuModel{ pub const gfx1011 = CpuModel{
@ -937,7 +922,6 @@ pub const cpu = struct {
.lds_misaligned_bug, .lds_misaligned_bug,
.ldsbankcount32, .ldsbankcount32,
.mad_mac_f32_insts, .mad_mac_f32_insts,
.no_xnack_support,
.nsa_encoding, .nsa_encoding,
.nsa_to_vmem_bug, .nsa_to_vmem_bug,
.offset_3f_bug, .offset_3f_bug,
@ -950,6 +934,7 @@ pub const cpu = struct {
.vcmpx_permlane_hazard, .vcmpx_permlane_hazard,
.vmem_to_scalar_write_hazard, .vmem_to_scalar_write_hazard,
.wavefrontsize32, .wavefrontsize32,
.xnack_support,
}), }),
}; };
pub const gfx1012 = CpuModel{ pub const gfx1012 = CpuModel{
@ -970,7 +955,6 @@ pub const cpu = struct {
.lds_misaligned_bug, .lds_misaligned_bug,
.ldsbankcount32, .ldsbankcount32,
.mad_mac_f32_insts, .mad_mac_f32_insts,
.no_xnack_support,
.nsa_encoding, .nsa_encoding,
.nsa_to_vmem_bug, .nsa_to_vmem_bug,
.offset_3f_bug, .offset_3f_bug,
@ -983,6 +967,7 @@ pub const cpu = struct {
.vcmpx_permlane_hazard, .vcmpx_permlane_hazard,
.vmem_to_scalar_write_hazard, .vmem_to_scalar_write_hazard,
.wavefrontsize32, .wavefrontsize32,
.xnack_support,
}), }),
}; };
pub const gfx1030 = CpuModel{ pub const gfx1030 = CpuModel{
@ -998,7 +983,6 @@ pub const cpu = struct {
.gfx10_3_insts, .gfx10_3_insts,
.gfx10_b_encoding, .gfx10_b_encoding,
.ldsbankcount32, .ldsbankcount32,
.no_xnack_support,
.nsa_encoding, .nsa_encoding,
.wavefrontsize32, .wavefrontsize32,
}), }),
@ -1016,7 +1000,6 @@ pub const cpu = struct {
.gfx10_3_insts, .gfx10_3_insts,
.gfx10_b_encoding, .gfx10_b_encoding,
.ldsbankcount32, .ldsbankcount32,
.no_xnack_support,
.nsa_encoding, .nsa_encoding,
.wavefrontsize32, .wavefrontsize32,
}), }),
@ -1034,7 +1017,6 @@ pub const cpu = struct {
.gfx10_3_insts, .gfx10_3_insts,
.gfx10_b_encoding, .gfx10_b_encoding,
.ldsbankcount32, .ldsbankcount32,
.no_xnack_support,
.nsa_encoding, .nsa_encoding,
.wavefrontsize32, .wavefrontsize32,
}), }),
@ -1052,7 +1034,6 @@ pub const cpu = struct {
.gfx10_3_insts, .gfx10_3_insts,
.gfx10_b_encoding, .gfx10_b_encoding,
.ldsbankcount32, .ldsbankcount32,
.no_xnack_support,
.nsa_encoding, .nsa_encoding,
.wavefrontsize32, .wavefrontsize32,
}), }),
@ -1063,8 +1044,6 @@ pub const cpu = struct {
.features = featureSet(&[_]Feature{ .features = featureSet(&[_]Feature{
.fast_fmaf, .fast_fmaf,
.half_rate_64_ops, .half_rate_64_ops,
.ldsbankcount32,
.no_xnack_support,
.southern_islands, .southern_islands,
}), }),
}; };
@ -1072,8 +1051,6 @@ pub const cpu = struct {
.name = "gfx601", .name = "gfx601",
.llvm_name = "gfx601", .llvm_name = "gfx601",
.features = featureSet(&[_]Feature{ .features = featureSet(&[_]Feature{
.ldsbankcount32,
.no_xnack_support,
.southern_islands, .southern_islands,
}), }),
}; };
@ -1081,8 +1058,6 @@ pub const cpu = struct {
.name = "gfx602", .name = "gfx602",
.llvm_name = "gfx602", .llvm_name = "gfx602",
.features = featureSet(&[_]Feature{ .features = featureSet(&[_]Feature{
.ldsbankcount32,
.no_xnack_support,
.southern_islands, .southern_islands,
}), }),
}; };
@ -1091,7 +1066,6 @@ pub const cpu = struct {
.llvm_name = "gfx700", .llvm_name = "gfx700",
.features = featureSet(&[_]Feature{ .features = featureSet(&[_]Feature{
.ldsbankcount32, .ldsbankcount32,
.no_xnack_support,
.sea_islands, .sea_islands,
}), }),
}; };
@ -1102,7 +1076,6 @@ pub const cpu = struct {
.fast_fmaf, .fast_fmaf,
.half_rate_64_ops, .half_rate_64_ops,
.ldsbankcount32, .ldsbankcount32,
.no_xnack_support,
.sea_islands, .sea_islands,
}), }),
}; };
@ -1112,7 +1085,6 @@ pub const cpu = struct {
.features = featureSet(&[_]Feature{ .features = featureSet(&[_]Feature{
.fast_fmaf, .fast_fmaf,
.ldsbankcount16, .ldsbankcount16,
.no_xnack_support,
.sea_islands, .sea_islands,
}), }),
}; };
@ -1121,7 +1093,6 @@ pub const cpu = struct {
.llvm_name = "gfx703", .llvm_name = "gfx703",
.features = featureSet(&[_]Feature{ .features = featureSet(&[_]Feature{
.ldsbankcount16, .ldsbankcount16,
.no_xnack_support,
.sea_islands, .sea_islands,
}), }),
}; };
@ -1130,7 +1101,6 @@ pub const cpu = struct {
.llvm_name = "gfx704", .llvm_name = "gfx704",
.features = featureSet(&[_]Feature{ .features = featureSet(&[_]Feature{
.ldsbankcount32, .ldsbankcount32,
.no_xnack_support,
.sea_islands, .sea_islands,
}), }),
}; };
@ -1139,7 +1109,6 @@ pub const cpu = struct {
.llvm_name = "gfx705", .llvm_name = "gfx705",
.features = featureSet(&[_]Feature{ .features = featureSet(&[_]Feature{
.ldsbankcount16, .ldsbankcount16,
.no_xnack_support,
.sea_islands, .sea_islands,
}), }),
}; };
@ -1152,7 +1121,7 @@ pub const cpu = struct {
.ldsbankcount32, .ldsbankcount32,
.unpacked_d16_vmem, .unpacked_d16_vmem,
.volcanic_islands, .volcanic_islands,
.xnack, .xnack_support,
}), }),
}; };
pub const gfx802 = CpuModel{ pub const gfx802 = CpuModel{
@ -1160,7 +1129,6 @@ pub const cpu = struct {
.llvm_name = "gfx802", .llvm_name = "gfx802",
.features = featureSet(&[_]Feature{ .features = featureSet(&[_]Feature{
.ldsbankcount32, .ldsbankcount32,
.no_xnack_support,
.sgpr_init_bug, .sgpr_init_bug,
.unpacked_d16_vmem, .unpacked_d16_vmem,
.volcanic_islands, .volcanic_islands,
@ -1171,7 +1139,6 @@ pub const cpu = struct {
.llvm_name = "gfx803", .llvm_name = "gfx803",
.features = featureSet(&[_]Feature{ .features = featureSet(&[_]Feature{
.ldsbankcount32, .ldsbankcount32,
.no_xnack_support,
.unpacked_d16_vmem, .unpacked_d16_vmem,
.volcanic_islands, .volcanic_islands,
}), }),
@ -1181,7 +1148,6 @@ pub const cpu = struct {
.llvm_name = "gfx805", .llvm_name = "gfx805",
.features = featureSet(&[_]Feature{ .features = featureSet(&[_]Feature{
.ldsbankcount32, .ldsbankcount32,
.no_xnack_support,
.sgpr_init_bug, .sgpr_init_bug,
.unpacked_d16_vmem, .unpacked_d16_vmem,
.volcanic_islands, .volcanic_islands,
@ -1195,7 +1161,7 @@ pub const cpu = struct {
.image_store_d16_bug, .image_store_d16_bug,
.ldsbankcount16, .ldsbankcount16,
.volcanic_islands, .volcanic_islands,
.xnack, .xnack_support,
}), }),
}; };
pub const gfx900 = CpuModel{ pub const gfx900 = CpuModel{
@ -1206,8 +1172,6 @@ pub const cpu = struct {
.image_gather4_d16_bug, .image_gather4_d16_bug,
.ldsbankcount32, .ldsbankcount32,
.mad_mix_insts, .mad_mix_insts,
.no_sram_ecc_support,
.no_xnack_support,
}), }),
}; };
pub const gfx902 = CpuModel{ pub const gfx902 = CpuModel{
@ -1218,8 +1182,6 @@ pub const cpu = struct {
.image_gather4_d16_bug, .image_gather4_d16_bug,
.ldsbankcount32, .ldsbankcount32,
.mad_mix_insts, .mad_mix_insts,
.no_sram_ecc_support,
.xnack,
}), }),
}; };
pub const gfx904 = CpuModel{ pub const gfx904 = CpuModel{
@ -1230,8 +1192,6 @@ pub const cpu = struct {
.gfx9, .gfx9,
.image_gather4_d16_bug, .image_gather4_d16_bug,
.ldsbankcount32, .ldsbankcount32,
.no_sram_ecc_support,
.no_xnack_support,
}), }),
}; };
pub const gfx906 = CpuModel{ pub const gfx906 = CpuModel{
@ -1246,7 +1206,7 @@ pub const cpu = struct {
.half_rate_64_ops, .half_rate_64_ops,
.image_gather4_d16_bug, .image_gather4_d16_bug,
.ldsbankcount32, .ldsbankcount32,
.no_xnack_support, .sramecc_support,
}), }),
}; };
pub const gfx908 = CpuModel{ pub const gfx908 = CpuModel{
@ -1269,7 +1229,7 @@ pub const cpu = struct {
.mai_insts, .mai_insts,
.mfma_inline_literal_bug, .mfma_inline_literal_bug,
.pk_fmac_f16_inst, .pk_fmac_f16_inst,
.sram_ecc, .sramecc_support,
}), }),
}; };
pub const gfx909 = CpuModel{ pub const gfx909 = CpuModel{
@ -1280,7 +1240,6 @@ pub const cpu = struct {
.image_gather4_d16_bug, .image_gather4_d16_bug,
.ldsbankcount32, .ldsbankcount32,
.mad_mix_insts, .mad_mix_insts,
.xnack,
}), }),
}; };
pub const gfx90c = CpuModel{ pub const gfx90c = CpuModel{
@ -1298,8 +1257,6 @@ pub const cpu = struct {
.name = "hainan", .name = "hainan",
.llvm_name = "hainan", .llvm_name = "hainan",
.features = featureSet(&[_]Feature{ .features = featureSet(&[_]Feature{
.ldsbankcount32,
.no_xnack_support,
.southern_islands, .southern_islands,
}), }),
}; };
@ -1310,7 +1267,6 @@ pub const cpu = struct {
.fast_fmaf, .fast_fmaf,
.half_rate_64_ops, .half_rate_64_ops,
.ldsbankcount32, .ldsbankcount32,
.no_xnack_support,
.sea_islands, .sea_islands,
}), }),
}; };
@ -1319,7 +1275,6 @@ pub const cpu = struct {
.llvm_name = "iceland", .llvm_name = "iceland",
.features = featureSet(&[_]Feature{ .features = featureSet(&[_]Feature{
.ldsbankcount32, .ldsbankcount32,
.no_xnack_support,
.sgpr_init_bug, .sgpr_init_bug,
.unpacked_d16_vmem, .unpacked_d16_vmem,
.volcanic_islands, .volcanic_islands,
@ -1330,7 +1285,6 @@ pub const cpu = struct {
.llvm_name = "kabini", .llvm_name = "kabini",
.features = featureSet(&[_]Feature{ .features = featureSet(&[_]Feature{
.ldsbankcount16, .ldsbankcount16,
.no_xnack_support,
.sea_islands, .sea_islands,
}), }),
}; };
@ -1339,7 +1293,6 @@ pub const cpu = struct {
.llvm_name = "kaveri", .llvm_name = "kaveri",
.features = featureSet(&[_]Feature{ .features = featureSet(&[_]Feature{
.ldsbankcount32, .ldsbankcount32,
.no_xnack_support,
.sea_islands, .sea_islands,
}), }),
}; };
@ -1348,7 +1301,6 @@ pub const cpu = struct {
.llvm_name = "mullins", .llvm_name = "mullins",
.features = featureSet(&[_]Feature{ .features = featureSet(&[_]Feature{
.ldsbankcount16, .ldsbankcount16,
.no_xnack_support,
.sea_islands, .sea_islands,
}), }),
}; };
@ -1356,8 +1308,6 @@ pub const cpu = struct {
.name = "oland", .name = "oland",
.llvm_name = "oland", .llvm_name = "oland",
.features = featureSet(&[_]Feature{ .features = featureSet(&[_]Feature{
.ldsbankcount32,
.no_xnack_support,
.southern_islands, .southern_islands,
}), }),
}; };
@ -1365,8 +1315,6 @@ pub const cpu = struct {
.name = "pitcairn", .name = "pitcairn",
.llvm_name = "pitcairn", .llvm_name = "pitcairn",
.features = featureSet(&[_]Feature{ .features = featureSet(&[_]Feature{
.ldsbankcount32,
.no_xnack_support,
.southern_islands, .southern_islands,
}), }),
}; };
@ -1375,7 +1323,6 @@ pub const cpu = struct {
.llvm_name = "polaris10", .llvm_name = "polaris10",
.features = featureSet(&[_]Feature{ .features = featureSet(&[_]Feature{
.ldsbankcount32, .ldsbankcount32,
.no_xnack_support,
.unpacked_d16_vmem, .unpacked_d16_vmem,
.volcanic_islands, .volcanic_islands,
}), }),
@ -1385,7 +1332,6 @@ pub const cpu = struct {
.llvm_name = "polaris11", .llvm_name = "polaris11",
.features = featureSet(&[_]Feature{ .features = featureSet(&[_]Feature{
.ldsbankcount32, .ldsbankcount32,
.no_xnack_support,
.unpacked_d16_vmem, .unpacked_d16_vmem,
.volcanic_islands, .volcanic_islands,
}), }),
@ -1398,7 +1344,7 @@ pub const cpu = struct {
.image_store_d16_bug, .image_store_d16_bug,
.ldsbankcount16, .ldsbankcount16,
.volcanic_islands, .volcanic_islands,
.xnack, .xnack_support,
}), }),
}; };
pub const tahiti = CpuModel{ pub const tahiti = CpuModel{
@ -1407,8 +1353,6 @@ pub const cpu = struct {
.features = featureSet(&[_]Feature{ .features = featureSet(&[_]Feature{
.fast_fmaf, .fast_fmaf,
.half_rate_64_ops, .half_rate_64_ops,
.ldsbankcount32,
.no_xnack_support,
.southern_islands, .southern_islands,
}), }),
}; };
@ -1417,7 +1361,6 @@ pub const cpu = struct {
.llvm_name = "tonga", .llvm_name = "tonga",
.features = featureSet(&[_]Feature{ .features = featureSet(&[_]Feature{
.ldsbankcount32, .ldsbankcount32,
.no_xnack_support,
.sgpr_init_bug, .sgpr_init_bug,
.unpacked_d16_vmem, .unpacked_d16_vmem,
.volcanic_islands, .volcanic_islands,
@ -1428,7 +1371,6 @@ pub const cpu = struct {
.llvm_name = "tongapro", .llvm_name = "tongapro",
.features = featureSet(&[_]Feature{ .features = featureSet(&[_]Feature{
.ldsbankcount32, .ldsbankcount32,
.no_xnack_support,
.sgpr_init_bug, .sgpr_init_bug,
.unpacked_d16_vmem, .unpacked_d16_vmem,
.volcanic_islands, .volcanic_islands,
@ -1438,8 +1380,6 @@ pub const cpu = struct {
.name = "verde", .name = "verde",
.llvm_name = "verde", .llvm_name = "verde",
.features = featureSet(&[_]Feature{ .features = featureSet(&[_]Feature{
.ldsbankcount32,
.no_xnack_support,
.southern_islands, .southern_islands,
}), }),
}; };

10
tools/update_cpu_features.zig
View file

@ -44,6 +44,16 @@ const llvm_targets = [_]LlvmTarget{
.zig_name = "amdgpu", .zig_name = "amdgpu",
.llvm_name = "AMDGPU", .llvm_name = "AMDGPU",
.td_name = "AMDGPU.td", .td_name = "AMDGPU.td",
.feature_overrides = &.{
.{
.llvm_name = "DumpCode",
.omit = true,
},
.{
.llvm_name = "dumpcode",
.omit = true,
},
},
}, },
.{ .{
.zig_name = "arc", .zig_name = "arc",