test: mark riscv soft float targets as extra targets

Soft float is a very rare use case for riscv*-linux. No point wasting CI
resources on these targets, especially since our arm and mips soft float
coverage is already likely to catch most soft float bugs.
This commit is contained in:
Alex Rønne Petersen 2025-07-16 16:54:12 +02:00
parent 89ab6b161d
commit 6002514b72
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@ -847,6 +847,7 @@ const test_targets = blk: {
.arch_os_abi = "riscv32-linux-none", .arch_os_abi = "riscv32-linux-none",
.cpu_features = "baseline-d-f", .cpu_features = "baseline-d-f",
}) catch unreachable, }) catch unreachable,
.extra_target = true,
}, },
.{ .{
.target = .{ .target = .{
@ -872,6 +873,7 @@ const test_targets = blk: {
.cpu_features = "baseline-d-f", .cpu_features = "baseline-d-f",
}) catch unreachable, }) catch unreachable,
.link_libc = true, .link_libc = true,
.extra_target = true,
}, },
.{ .{
.target = .{ .target = .{
@ -904,6 +906,7 @@ const test_targets = blk: {
.arch_os_abi = "riscv64-linux-none", .arch_os_abi = "riscv64-linux-none",
.cpu_features = "baseline-d-f", .cpu_features = "baseline-d-f",
}) catch unreachable, }) catch unreachable,
.extra_target = true,
}, },
.{ .{
.target = .{ .target = .{
@ -929,6 +932,7 @@ const test_targets = blk: {
.cpu_features = "baseline-d-f", .cpu_features = "baseline-d-f",
}) catch unreachable, }) catch unreachable,
.link_libc = true, .link_libc = true,
.extra_target = true,
}, },
.{ .{
.target = .{ .target = .{