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test: mark riscv soft float targets as extra targets
Soft float is a very rare use case for riscv*-linux. No point wasting CI resources on these targets, especially since our arm and mips soft float coverage is already likely to catch most soft float bugs.
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1 changed files with 4 additions and 0 deletions
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@ -847,6 +847,7 @@ const test_targets = blk: {
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.arch_os_abi = "riscv32-linux-none",
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.arch_os_abi = "riscv32-linux-none",
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.cpu_features = "baseline-d-f",
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.cpu_features = "baseline-d-f",
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}) catch unreachable,
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}) catch unreachable,
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.extra_target = true,
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},
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},
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.{
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.{
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.target = .{
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.target = .{
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@ -872,6 +873,7 @@ const test_targets = blk: {
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.cpu_features = "baseline-d-f",
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.cpu_features = "baseline-d-f",
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}) catch unreachable,
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}) catch unreachable,
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.link_libc = true,
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.link_libc = true,
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.extra_target = true,
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},
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},
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.{
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.{
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.target = .{
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.target = .{
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@ -904,6 +906,7 @@ const test_targets = blk: {
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.arch_os_abi = "riscv64-linux-none",
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.arch_os_abi = "riscv64-linux-none",
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.cpu_features = "baseline-d-f",
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.cpu_features = "baseline-d-f",
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}) catch unreachable,
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}) catch unreachable,
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.extra_target = true,
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},
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},
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.{
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.{
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.target = .{
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.target = .{
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@ -929,6 +932,7 @@ const test_targets = blk: {
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.cpu_features = "baseline-d-f",
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.cpu_features = "baseline-d-f",
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}) catch unreachable,
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}) catch unreachable,
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.link_libc = true,
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.link_libc = true,
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.extra_target = true,
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},
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},
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.{
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.{
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.target = .{
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.target = .{
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