Commit graph

15 commits

Author SHA1 Message Date
GasInfinity
fca748ffba
fix: add i86 cpu in update_cpu_features 2025-10-29 14:34:58 +01:00
GasInfinity
104c272ae5
feat: init x86_16 arch via CBE 2025-10-27 11:19:51 +01:00
Alex Rønne Petersen
978555eea4
std.Target.x86: purge avx10.n-256, rename avx10.n_512 to avx10.n, require evex512 for avx512f
Intel has abandoned AVX10.N/128,256; AVX10.N is now always 512-bit.
2025-08-30 06:36:41 +02:00
Alex Rønne Petersen
587eddda28
std.Target: update CPU features to LLVM 21 2025-08-30 06:36:41 +02:00
Alex Rønne Petersen
4de368a1b6
std.Target: Update CPU models/features for LLVM 20.
Closes #21818.
2025-04-04 06:08:09 +02:00
Jacob Young
ac1a975f9b x86_64: implement clz and not 2025-01-16 20:42:08 -05:00
David Rubin
f36f7d54a7
refactor update_cpu_features.zig
Most of this commit is whitespace changes, moving to use RLS
for assigning the `CpuModel`
2024-11-25 01:11:15 -08:00
David Rubin
9e17e097e5
make crc32 a featdep of sse4.2
To my knowledge there isn't an implementation of `sse4.2` that doesn't have `crc32`.
The Clang driver also sets `crc32` to be implicitly enabled when an explicit `-crc32`
wasn't provided. This matches that behaviour.

We need this behaviour to compile libraries like `rocksdb` which currently guard against
`crc32` intrinsics by checking for `sse4.2`.
2024-11-25 01:11:15 -08:00
Alex Rønne Petersen
916eaad1ef std.Target: Update CPU models/features for LLVM 19.1.0. 2024-09-19 18:20:22 -07:00
Alex Rønne Petersen
da8b7fb0c0 std.Target: Update CPU models/features for LLVM 19. 2024-09-19 18:20:21 -07:00
mlugg
0fe3fd01dd
std: update std.builtin.Type fields to follow naming conventions
The compiler actually doesn't need any functional changes for this: Sema
does reification based on the tag indices of `std.builtin.Type` already!
So, no zig1.wasm update is necessary.

This change is necessary to disallow name clashes between fields and
decls on a type, which is a prerequisite of #9938.
2024-08-28 08:39:59 +01:00
Linus Groh
fd434fcd38 std.Target: Rename feature_set_fns to FeatureSetFns
From https://ziglang.org/documentation/master/#Names:

> If `x` is callable, and `x`'s return type is `type`, then `x` should
> be `TitleCase`.
2024-08-12 00:34:59 +01:00
Andrew Kelley
d34fae26d5 LLVM 18 std lib updates and fixes
* some manual fixes to generated CPU features code. In the future it
  would be nice to make the script do those automatically.

* add to various target OS switches. Some of the values I was unsure of
  and added TODO panics, for example in the case of spirv CPU arch.
2024-05-08 19:37:28 -07:00
Andrew Kelley
109ec72924 update CPU features to LLVM 18
release/18.x branch, commit 78b99c73ee4b96fe9ce0e294d4632326afb2db42
2024-05-08 19:37:28 -07:00
Andrew Kelley
67d48b94d6 std.Target: flatten 2024-01-01 17:51:18 -07:00
Renamed from lib/std/target/x86.zig (Browse further)