Commit graph

327 commits

Author SHA1 Message Date
Alex Rønne Petersen
06d9e3bc06
Merge pull request #25691 from GasInfinity-Forks/x86_16-gcc
feat: init x86_16 arch via CBE
2025-10-28 10:19:21 +01:00
Alex Rønne Petersen
dba1bf9353 remove all Oracle Solaris support
There is no straightforward way for the Zig team to access the Solaris system
headers; to do this, one has to create an Oracle account, accept their EULA to
download the installer ISO, and finally install it on a machine or VM. We do not
have to jump through hoops like this for any other OS that we support, and no
one on the team has expressed willingness to do it.

As a result, we cannot audit any Solaris contributions to std.c or other
similarly sensitive parts of the standard library. The best we would be able to
do is assume that Solaris and illumos are 100% compatible with no way to verify
that assumption. But at that point, the solaris and illumos OS tags would be
functionally identical anyway.

For Solaris especially, any contributions that involve APIs introduced after the
OS was made closed-source would also be inherently more risky than equivalent
contributions for other proprietary OSs due to the case of Google LLC v. Oracle
America, Inc., wherein Oracle clearly demonstrated its willingness to pursue
legal action against entities that merely copy API declarations.

Finally, Oracle laid off most of the Solaris team in 2017; the OS has been in
maintenance mode since, presumably to be retired completely sometime in the 2030s.

For these reasons, this commit removes all Oracle Solaris support.

Anyone who still wishes to use Zig on Solaris can try their luck by simply using
illumos instead of solaris in target triples - chances are it'll work. But there
will be no effort from the Zig team to support this use case; we recommend that
people move to illumos instead.
2025-10-27 07:35:38 -07:00
GasInfinity
104c272ae5
feat: init x86_16 arch via CBE 2025-10-27 11:19:51 +01:00
Alex Rønne Petersen
9161923405
Revert "std.Target: xtensa defaults to windowed ABI"
This reverts commit c55e83eab1.

This was a misreading of XtensaFeatures.td on my part.
2025-10-27 06:09:33 +01:00
Alex Rønne Petersen
70206af482
Merge pull request #25640 from alexrp/std-target-more-arches
`std.Target`: add tags and info for alpha, hppa, microblaze, sh + some bonus commits
2025-10-23 19:35:54 +02:00
Alex Rønne Petersen
340d6ce1bf
std.builtin: move AddressSpace.Context to std.Target.AddressSpaceContext
This type has nothing to do with the language.
2025-10-23 09:27:17 +02:00
Alex Rønne Petersen
af1d777b27
std.builtin: add CallingConvention.sh_interrupt
Only supported in CBE.
2025-10-23 09:27:17 +02:00
Alex Rønne Petersen
4fa453ce20
std.builtin: add CallingConvention.microblaze_interrupt
Only supported in CBE.
2025-10-23 09:27:17 +02:00
Alex Rønne Petersen
abf40caeb7
std.builtin: add CallingConvention.msp430_interrupt
Supported by LLVM and CBE.
2025-10-23 09:27:17 +02:00
Alex Rønne Petersen
beb507a1ed
std.builtin: add CallingConvention.x86_64_x32
This was forgotten during the refactoring of std.builtin.CallingConvention. It
mirrors mips64_n32 for MIPS.
2025-10-23 09:27:17 +02:00
Alex Rønne Petersen
a1441943e4
std.Target: add stackGrowth() function 2025-10-23 09:27:17 +02:00
Alex Rønne Petersen
ee72f06f47
std.Target: add tags and info for alpha, hppa, microblaze, sh 2025-10-23 09:27:17 +02:00
Alex Rønne Petersen
c55e83eab1
std.Target: xtensa defaults to windowed ABI 2025-10-23 09:27:17 +02:00
Alex Rønne Petersen
3e2daa509a
std.Target: add arceb and xtensaeb Cpu.Arch tags 2025-10-23 09:27:17 +02:00
Alex Rønne Petersen
dda05b29c0
std.Target: fix cMaxIntAlignment() for a few architectures 2025-10-23 09:27:17 +02:00
Alex Rønne Petersen
45b80f2e41
std.Target: fix cTypePreferredAlignment() for arc 2025-10-23 09:27:17 +02:00
Alex Rønne Petersen
862e674758
std.Target: remove bogus hosted avr/msp430 prongs in cTypeBitSize()
These are microcontroller architectures; none of the OSs in the outer switch
run on them.
2025-10-23 09:27:17 +02:00
Alex Rønne Petersen
022dcbc37a
std.Target.DynamicLinker: recognize standard hexagon-linux-musl path 2025-10-23 09:27:16 +02:00
Alex Rønne Petersen
a7f085f0d7
std.Target: fix cCallingConvention() to pick mips64_n32 for muslabin32 2025-10-23 09:27:16 +02:00
Alex Rønne Petersen
93d54cb866 std.Target: bump min-max versions for OpenBSD from 7.6-7.7 to 7.7-7.8
https://cdn.openbsd.org/pub/OpenBSD/7.8/ANNOUNCEMENT
2025-10-23 03:21:06 +02:00
Alex Rønne Petersen
0e15b2ac10
std.Target: handle some more cases in toCoffMachine() 2025-10-22 17:28:19 +02:00
Alex Rønne Petersen
362a44a122
std.Target: better Abi.default() behavior for arc and xtensa 2025-10-22 17:28:19 +02:00
Alex Rønne Petersen
e8d060e5f5
std.Target: update lists of omitted LLVM tags 2025-10-22 17:28:19 +02:00
Alex Rønne Petersen
dbf9c7b548 compiler: add support for arc_interrupt calling convention
Only for use with the C backend at the moment.
2025-10-19 22:27:19 +02:00
Alex Rønne Petersen
f3da54f53c std.Target: move Cpu.supportsAddressSpace() up to here
This allows us to rule out support for certain address spaces based on the OS.
This commit is just a refactor, however, and doesn't actually make use of that
opportunity yet.
2025-10-18 11:13:28 +02:00
Alex Rønne Petersen
ddc815e3d8 drop support for powerpc64 ELF v1
* ELF v1 on powerpc64 is only barely kept on life support in a couple of Linux
  distros. I don't anticipate that this will last much longer.
* Most of the Linux world has moved to powerpc64le which requires ELF v2.
* Some Linux distros have even started supporting powerpc64 with ELF v2.
* The BSD world has long since moved to ELF v2.
* We have no actual linking support for ELF v1.
* ELF v1 had confused DWARF register mappings which is becoming a problem in
  our DWARF code in std.debug.

It's clear that ELF v1 is on its way out, and we never fully supported it
anyway. So let's not waste any time or energy on it going forward.

closes #5927
2025-10-06 01:28:56 +02:00
Alex Rønne Petersen
73602f2a13
std.Target: baseline model for s390x-zos should be arch10, not arch8 2025-10-05 00:23:51 +02:00
Jacob Young
e1f3fc6ce2 Coff2: create a new linker from scratch 2025-10-02 17:44:52 -04:00
Andrew Kelley
426af68b7d compiler: require comptime vector indexes 2025-09-20 18:33:00 -07:00
Alex Rønne Petersen
5e9e1fb0c8
std.Target: adjustments to LoongArch CPU models
* Remove the generic model; we already have generic_la32 and generic_la64 and
  pick appropriately based on bitness.
* Remove the loongarch64 model. We used this as our baseline for 64-bit, but it's
  actually pretty misleading and useless; it doesn't represent any real CPU and
  has less features than generic_la64.
* Add la64v1_0 and la64v1_1 models.
* Change our baseline CPU model for 64-bit to be la64v1_0, thus adding LSX to
  the baseline feature set.
2025-09-18 12:42:24 +02:00
Andrew Kelley
b7104231af
Merge pull request #25077 from ziglang/GenericReader
std.Io: delete GenericReader, AnyReader, FixedBufferStream; and related API breakage
2025-08-30 12:43:52 -07:00
Alex Rønne Petersen
0b9f5e2549
std.Target: fix alignment for int/long types on m68k 2025-08-30 06:36:41 +02:00
Alex Rønne Petersen
fdd32a2257
std.Target: add managarm OS tag 2025-08-30 06:36:41 +02:00
Alex Rønne Petersen
464eef390b
std.Target: make ultrasparc3 the baseline for sparc64-solaris
https://github.com/llvm/llvm-project/pull/149990
2025-08-30 06:36:41 +02:00
Alex Rønne Petersen
2c0cc81e74
std.Target: bump feature bit count from 288 to 317
/lib/std/debug.zig:559:14: error: reached unreachable code
        if (!ok) unreachable; // assertion failure
                 ^~~~~~~~~~~
    /lib/std/Target/riscv.zig:335:21: note: called at comptime here
        std.debug.assert(len <= CpuFeature.Set.needed_bit_count);
        ~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
2025-08-30 06:36:41 +02:00
Andrew Kelley
79f267f6b9 std.Io: delete GenericReader
and delete deprecated alias std.io
2025-08-29 17:14:26 -07:00
Maciej 'vesim' Kuliński
ff859088e4 std.Target: add vita os
Co-authored-by: Alex Rønne Petersen <alex@alexrp.com>
2025-08-26 07:50:06 +02:00
Alex Rønne Petersen
5d019abe4e start adding big endian RISC-V support
The big endian RISC-V effort is mostly driven by MIPS (the company) which is
pivoting to RISC-V, and presumably needs a big endian variant to fill the niche
that big endian MIPS (the ISA) did.

GCC already supports these targets, but LLVM support will only appear in 22;
this commit just adds the necessary target knowledge and checks on our end.
2025-08-25 16:15:17 +02:00
GasInfinity
306176046e chore(std.Target): explicitly set baseline only to arm with 3ds
* `arm` is the only supported tag for 3ds

Co-authored-by: Alex Rønne Petersen <alex@alexrp.com>
2025-08-22 04:14:53 +02:00
GasInfinity
851f31b0e1 chore(std.Target): document the 3ds version range 2025-08-22 04:14:53 +02:00
GasInfinity
cc71936eb9 feat(std.Target): add 3ds os 2025-08-22 04:14:53 +02:00
Alex Rønne Petersen
113d3dd3f0 std.Target: bump default android API level from 24 to 29
According to https://apilevels.com, 88.5% of Android users are on 29+. Older API
levels require libc as of https://github.com/ziglang/zig/pull/24629, which has
confused some users. Seems reasonable to bump the default so most people won't
be confused by this.
2025-08-13 08:59:13 +02:00
Alex Rønne Petersen
163e9ce7d9
Merge pull request #24629 from alexrp/android-requires-libc
`std.Target`: require libc for Android API levels prior to 29
2025-08-04 17:59:47 +02:00
Alex Rønne Petersen
ba7cc72c47
std.Target: bump watchos min version to 8.0.0 2025-08-03 20:08:19 +02:00
Alex Rønne Petersen
71722df4ab
std.Target: bump driverkit min version to 20.0.0 2025-08-03 20:08:07 +02:00
Alex Rønne Petersen
e9093b8d18
std.Target: bump max versions for Apple targets 2025-08-03 20:05:21 +02:00
Alex Rønne Petersen
5b74d33471
std.Target: bump amdhsa max version to 6.4.2 2025-08-03 20:00:32 +02:00
Alex Rønne Petersen
afe458e9b6
std.Target: bump vulkan max version to 1.4.321 2025-08-03 19:59:46 +02:00
Alex Rønne Petersen
7f2140710f
std.Target: bump cuda max version to 12.9.1 2025-08-03 19:59:46 +02:00
Alex Rønne Petersen
39b653c5e7
std.Target: bump freebsd max version to 14.3.0 2025-08-03 19:59:43 +02:00