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1311e997d4
This excludes all headers in /usr/include/dev because that directory is bonkers huge (18M). We can add these on an as-needed basis.
104 lines
No EOL
3.2 KiB
C
Vendored
104 lines
No EOL
3.2 KiB
C
Vendored
/* $OpenBSD: pte.h,v 1.10 2024/10/14 12:02:16 jsg Exp $ */
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/*
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* Copyright (c) 2014 Dale Rahn <drahn@dalerahn.com>
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*
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* Permission to use, copy, modify, and distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#ifndef _ARM_PTE_H_
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#define _ARM_PTE_H_
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/* level X descriptor */
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#define Lx_TYPE_MASK (0x00000003) /* mask of type bits */
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#define Lx_TYPE_S (0x00000001)
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#define Lx_TYPE_PT (0x00000003)
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// XXX need to investigate use of these
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#define Lx_PT_NS (1ULL<<63)
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#define Lx_PT_AP00 (0ULL<<61)
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#define Lx_PT_AP01 (1ULL<<61)
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#define Lx_PT_AP10 (2ULL<<61)
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#define Lx_PT_AP11 (3ULL<<61)
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#define Lx_PT_XN (1ULL<<60)
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#define Lx_PT_PXN (1ULL<<59)
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#define Lx_TABLE_ALIGN (4096)
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/* Block and Page attributes */
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/* TODO: Add the upper attributes */
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#define ATTR_MASK_H (0xfff0000000000000ULL)
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#define ATTR_MASK_L (0x0000000000000fffULL)
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#define ATTR_MASK (ATTR_MASK_H | ATTR_MASK_L)
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/* Bits 58:55 are reserved for software */
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#define ATTR_SW_MANAGED (1UL << 56)
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#define ATTR_SW_WIRED (1UL << 55)
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#define ATTR_UXN (1UL << 54)
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#define ATTR_PXN (1UL << 53)
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#define ATTR_GP (1UL << 50)
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#define ATTR_nG (1 << 11)
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#define ATTR_AF (1 << 10)
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#define ATTR_SH(x) ((x) << 8)
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#define ATTR_AP_RW_BIT (1 << 7)
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#define ATTR_AP(x) ((x) << 6)
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#define ATTR_AP_MASK ATTR_AP(3)
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#define ATTR_NS (1 << 5)
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#define ATTR_IDX(x) ((x) << 2)
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#define ATTR_IDX_MASK (7 << 2)
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#define PTE_ATTR_DEV_NGNRNE 0
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#define PTE_ATTR_DEV_NGNRE 1
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#define PTE_ATTR_CI 2
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#define PTE_ATTR_WB 3
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#define PTE_ATTR_WT 4
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#define PTE_MEMATTR_DEV_NGNRNE 0x0
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#define PTE_MEMATTR_DEV_NGNRE 0x1
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#define PTE_MEMATTR_CI 0x5
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#define PTE_MEMATTR_WB 0xf
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#define PTE_MEMATTR_WT 0xa
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#define SH_INNER 3
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#define SH_OUTER 2
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#define SH_NONE 0
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/* Level 0 table, 512GiB per entry */
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#define L0_SHIFT 39
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#define L0_INVAL 0x0 /* An invalid address */
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#define L0_BLOCK 0x1 /* A block */
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/* 0x2 also marks an invalid address */
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#define L0_TABLE 0x3 /* A next-level table */
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/* Level 1 table, 1GiB per entry */
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#define L1_SHIFT 30
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#define L1_SIZE (1 << L1_SHIFT)
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#define L1_OFFSET (L1_SIZE - 1)
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#define L1_INVAL L0_INVAL
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#define L1_BLOCK L0_BLOCK
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#define L1_TABLE L0_TABLE
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/* Level 2 table, 2MiB per entry */
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#define L2_SHIFT 21
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#define L2_SIZE (1 << L2_SHIFT)
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#define L2_OFFSET (L2_SIZE - 1)
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#define L2_INVAL L0_INVAL
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#define L2_BLOCK L0_BLOCK
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#define L2_TABLE L0_TABLE
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/* page mapping */
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#define L3_P 0x3
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#define Ln_ENTRIES (1 << 9)
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#define Ln_ADDR_MASK (Ln_ENTRIES - 1)
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#define Ln_TABLE_MASK ((1 << 12) - 1)
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/* physical page mask */
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#define PTE_RPGN (((1ULL << 48) - 1) & ~PAGE_MASK)
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#endif /* _ARM_PTE_H_ */ |